diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats')
| -rw-r--r-- | tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats | 98 |
1 files changed, 49 insertions, 49 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats index a61eed778..12453125c 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:16:10 +Real time: Sep/01/2012 13:43:15 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.53 -Virtual_time_in_minutes: 0.00883333 -Virtual_time_in_hours: 0.000147222 -Virtual_time_in_days: 6.13426e-06 +Virtual_time_in_seconds: 0.47 +Virtual_time_in_minutes: 0.00783333 +Virtual_time_in_hours: 0.000130556 +Virtual_time_in_days: 5.43981e-06 -Ruby_current_time: 342698 +Ruby_current_time: 143853 Ruby_start_time: 0 -Ruby_cycles: 342698 +Ruby_cycles: 143853 -mbytes_resident: 46.8906 -mbytes_total: 229.363 -resident_ratio: 0.204455 +mbytes_resident: 48.5508 +mbytes_total: 258.688 +resident_ratio: 0.187727 -ruby_cycles_executed: [ 342699 ] +ruby_cycles_executed: [ 143854 ] Busy Controller Counts: L1Cache-0:0 @@ -29,16 +29,16 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average: 1 | standard deviation: 0 | 0 8465 ] +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average: 1 | standard deviation: 0 | 0 8449 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 377 count: 8464 average: 39.4889 | standard deviation: 72.9776 | 0 6734 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 2 max: 375 count: 1185 average: 110.608 | standard deviation: 87.0282 | 0 458 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 377 count: 865 average: 62.2439 | standard deviation: 89.6671 | 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 2 max: 285 count: 6414 average: 23.2806 | standard deviation: 57.2661 | 0 5684 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_L1Cache: [binsize: 1 max: 3 count: 6734 average: 3 | standard deviation: 0 | 0 0 0 6734 ] -miss_latency_Directory: [binsize: 2 max: 377 count: 1730 average: 181.521 | standard deviation: 26.4115 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 1 max: 123 count: 8448 average: 16.0281 | standard deviation: 25.9113 | 0 0 0 6718 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 14 10 309 629 543 10 7 7 7 24 22 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 42 37 51 2 1 1 3 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD: [binsize: 1 max: 98 count: 1183 average: 41.5604 | standard deviation: 30.9227 | 0 0 0 456 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 9 4 103 318 220 1 4 2 4 12 9 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 10 13 11 1 0 0 0 0 1 ] +miss_latency_ST: [binsize: 1 max: 95 count: 865 average: 23.8058 | standard deviation: 31.1488 | 0 0 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 27 63 122 1 2 4 0 3 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 6 30 0 0 1 ] +miss_latency_IFETCH: [binsize: 1 max: 123 count: 6400 average: 10.2573 | standard deviation: 20.4119 | 0 0 0 5670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 5 179 248 201 8 1 1 3 9 6 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 27 18 10 1 1 0 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] +miss_latency_L1Cache: [binsize: 1 max: 3 count: 6718 average: 3 | standard deviation: 0 | 0 0 0 6718 ] +miss_latency_Directory: [binsize: 1 max: 123 count: 1730 average: 66.6191 | standard deviation: 7.72578 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 14 10 309 629 543 10 7 7 7 24 22 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 42 37 51 2 1 1 3 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -47,14 +47,14 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average: 61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 1729 -miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 458 average: 3 | standard deviation: 0 | 0 0 0 458 ] -miss_latency_LD_Directory: [binsize: 2 max: 375 count: 727 average: 178.4 | standard deviation: 21.0913 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 456 average: 3 | standard deviation: 0 | 0 0 0 456 ] +miss_latency_LD_Directory: [binsize: 1 max: 98 count: 727 average: 65.7469 | standard deviation: 6.09023 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 9 4 103 318 220 1 4 2 4 12 9 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 10 13 11 1 0 0 0 0 1 ] miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 592 average: 3 | standard deviation: 0 | 0 0 0 592 ] -miss_latency_ST_Directory: [binsize: 2 max: 377 count: 273 average: 190.714 | standard deviation: 36.5384 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ] -miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5684 average: 3 | standard deviation: 0 | 0 0 0 5684 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 285 count: 730 average: 181.192 | standard deviation: 25.9199 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 1 max: 95 count: 273 average: 68.9231 | standard deviation: 9.83653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 27 63 122 1 2 4 0 3 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 6 30 0 0 1 ] +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5670 average: 3 | standard deviation: 0 | 0 0 0 5670 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 123 count: 730 average: 66.626 | standard deviation: 8.11043 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 5 179 248 201 8 1 1 3 9 6 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 27 18 10 1 1 0 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -86,11 +86,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 13155 +page_reclaims: 9931 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- @@ -103,9 +103,9 @@ total_msgs: 20736 total_bytes: 829440 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.52117 - links_utilized_percent_switch_0_link_0: 2.5235 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.51884 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 6.00613 + links_utilized_percent_switch_0_link_0: 6.01169 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 6.00057 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1 @@ -114,9 +114,9 @@ links_utilized_percent_switch_0: 2.52117 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.52117 - links_utilized_percent_switch_1_link_0: 2.51884 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.5235 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 6.00613 + links_utilized_percent_switch_1_link_0: 6.00057 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 6.01169 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1 @@ -125,9 +125,9 @@ links_utilized_percent_switch_1: 2.52117 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 2.52117 - links_utilized_percent_switch_2_link_0: 2.5235 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.51884 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 6.00613 + links_utilized_percent_switch_2_link_0: 6.01169 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 6.00057 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1 @@ -149,8 +149,8 @@ Cache Stats: system.l1_cntrl0.cacheMemory --- L1Cache --- - Event Counts - -Load [1185 ] 1185 -Ifetch [6414 ] 6414 +Load [1183 ] 1183 +Ifetch [6400 ] 6400 Store [865 ] 865 Data [1730 ] 1730 Fwd_GETX [0 ] 0 @@ -168,8 +168,8 @@ I Replacement [0 ] 0 II Writeback_Nack [0 ] 0 -M Load [458 ] 458 -M Ifetch [5684 ] 5684 +M Load [456 ] 456 +M Ifetch [5670 ] 5670 M Store [592 ] 592 M Fwd_GETX [0 ] 0 M Inv [0 ] 0 @@ -190,19 +190,19 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 3456 memory_reads: 1730 memory_writes: 1726 - memory_refreshes: 714 - memory_total_request_delays: 4411 - memory_delays_per_request: 1.27633 - memory_delays_in_input_queue: 1083 - memory_delays_behind_head_of_bank_queue: 8 - memory_delays_stalled_at_head_of_bank_queue: 3320 - memory_stalls_for_bank_busy: 1509 + memory_refreshes: 999 + memory_total_request_delays: 3048 + memory_delays_per_request: 0.881944 + memory_delays_in_input_queue: 0 + memory_delays_behind_head_of_bank_queue: 11 + memory_delays_stalled_at_head_of_bank_queue: 3037 + memory_stalls_for_bank_busy: 1500 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 99 - memory_stalls_for_bus: 1677 + memory_stalls_for_arbitration: 107 + memory_stalls_for_bus: 1375 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 35 + memory_stalls_for_read_write_turnaround: 55 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 162 36 92 110 106 362 98 36 32 34 83 92 110 104 84 86 83 53 50 58 64 124 212 72 66 50 122 190 220 325 42 98 |