diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby')
| -rw-r--r-- | tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats | 149 | ||||
| -rw-r--r-- | tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt | 49 |
2 files changed, 54 insertions, 144 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats index b561f1129..005ede722 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Mar/06/2013 20:31:07 +Real time: Jun/08/2013 13:51:49 Profiler Stats -------------- @@ -7,20 +7,18 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.63 -Virtual_time_in_minutes: 0.0105 -Virtual_time_in_hours: 0.000175 -Virtual_time_in_days: 7.29167e-06 +Virtual_time_in_seconds: 0.5 +Virtual_time_in_minutes: 0.00833333 +Virtual_time_in_hours: 0.000138889 +Virtual_time_in_days: 5.78704e-06 Ruby_current_time: 143853 Ruby_start_time: 0 Ruby_cycles: 143853 -mbytes_resident: 55.1172 -mbytes_total: 146.695 -resident_ratio: 0.375806 - -ruby_cycles_executed: [ 143854 ] +mbytes_resident: 55.0938 +mbytes_total: 142.211 +resident_ratio: 0.387464 Busy Controller Counts: L1Cache-0:0 @@ -64,7 +62,6 @@ Request vs. RubySystem State Profile -------------------------------- -filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Message Delayed Cycles ---------------------- @@ -85,10 +82,10 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 10897 +page_reclaims: 11329 page_faults: 0 swaps: 0 -block_inputs: 336 +block_inputs: 0 block_outputs: 88 Network Stats @@ -133,129 +130,3 @@ links_utilized_percent_switch_2: 6.00613 outgoing_messages_switch_2_link_1_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1 - --- L1Cache --- - - Event Counts - -Load [1183 ] 1183 -Ifetch [6400 ] 6400 -Store [865 ] 865 -Data [1730 ] 1730 -Fwd_GETX [0 ] 0 -Inv [0 ] 0 -Replacement [1726 ] 1726 -Writeback_Ack [1726 ] 1726 -Writeback_Nack [0 ] 0 - - - Transitions - -I Load [727 ] 727 -I Ifetch [730 ] 730 -I Store [273 ] 273 -I Inv [0 ] 0 -I Replacement [0 ] 0 - -II Writeback_Nack [0 ] 0 - -M Load [456 ] 456 -M Ifetch [5670 ] 5670 -M Store [592 ] 592 -M Fwd_GETX [0 ] 0 -M Inv [0 ] 0 -M Replacement [1726 ] 1726 - -MI Fwd_GETX [0 ] 0 -MI Inv [0 ] 0 -MI Writeback_Ack [1726 ] 1726 -MI Writeback_Nack [0 ] 0 - -MII Fwd_GETX [0 ] 0 - -IS Data [1457 ] 1457 - -IM Data [273 ] 273 - -Memory controller: system.ruby.dir_cntrl0.memBuffer: - memory_total_requests: 3456 - memory_reads: 1730 - memory_writes: 1726 - memory_refreshes: 999 - memory_total_request_delays: 3048 - memory_delays_per_request: 0.881944 - memory_delays_in_input_queue: 0 - memory_delays_behind_head_of_bank_queue: 11 - memory_delays_stalled_at_head_of_bank_queue: 3037 - memory_stalls_for_bank_busy: 1500 - memory_stalls_for_random_busy: 0 - memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 107 - memory_stalls_for_bus: 1375 - memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 55 - memory_stalls_for_read_read_turnaround: 0 - accesses_per_bank: 162 36 92 110 106 362 98 36 32 34 83 92 110 104 84 86 83 53 50 58 64 124 212 72 66 50 122 190 220 325 42 98 - - --- Directory --- - - Event Counts - -GETX [1730 ] 1730 -GETS [0 ] 0 -PUTX [1726 ] 1726 -PUTX_NotOwner [0 ] 0 -DMA_READ [0 ] 0 -DMA_WRITE [0 ] 0 -Memory_Data [1730 ] 1730 -Memory_Ack [1726 ] 1726 - - - Transitions - -I GETX [1730 ] 1730 -I PUTX_NotOwner [0 ] 0 -I DMA_READ [0 ] 0 -I DMA_WRITE [0 ] 0 - -M GETX [0 ] 0 -M PUTX [1726 ] 1726 -M PUTX_NotOwner [0 ] 0 -M DMA_READ [0 ] 0 -M DMA_WRITE [0 ] 0 - -M_DRD GETX [0 ] 0 -M_DRD PUTX [0 ] 0 - -M_DWR GETX [0 ] 0 -M_DWR PUTX [0 ] 0 - -M_DWRI GETX [0 ] 0 -M_DWRI Memory_Ack [0 ] 0 - -M_DRDI GETX [0 ] 0 -M_DRDI Memory_Ack [0 ] 0 - -IM GETX [0 ] 0 -IM GETS [0 ] 0 -IM PUTX [0 ] 0 -IM PUTX_NotOwner [0 ] 0 -IM DMA_READ [0 ] 0 -IM DMA_WRITE [0 ] 0 -IM Memory_Data [1730 ] 1730 - -MI GETX [0 ] 0 -MI GETS [0 ] 0 -MI PUTX [0 ] 0 -MI PUTX_NotOwner [0 ] 0 -MI DMA_READ [0 ] 0 -MI DMA_WRITE [0 ] 0 -MI Memory_Ack [1726 ] 1726 - -ID GETX [0 ] 0 -ID GETS [0 ] 0 -ID PUTX [0 ] 0 -ID PUTX_NotOwner [0 ] 0 -ID DMA_READ [0 ] 0 -ID DMA_WRITE [0 ] 0 -ID Memory_Data [0 ] 0 - -ID_W GETX [0 ] 0 -ID_W GETS [0 ] 0 -ID_W PUTX [0 ] 0 -ID_W PUTX_NotOwner [0 ] 0 -ID_W DMA_READ [0 ] 0 -ID_W DMA_WRITE [0 ] 0 -ID_W Memory_Ack [0 ] 0 - diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt index e942e8340..b55a5b3d1 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt @@ -4,16 +4,31 @@ sim_seconds 0.000144 # Nu sim_ticks 143853 # Number of ticks simulated final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 31570 # Simulator instruction rate (inst/s) -host_op_rate 31567 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 710572 # Simulator tick rate (ticks/s) -host_mem_usage 153096 # Number of bytes of host memory used -host_seconds 0.20 # Real time elapsed on the host +host_inst_rate 39172 # Simulator instruction rate (inst/s) +host_op_rate 39167 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 881633 # Simulator tick rate (ticks/s) +host_mem_usage 145628 # Number of bytes of host memory used +host_seconds 0.16 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits system.ruby.l1_cntrl0.cacheMemory.demand_misses 1730 # Number of cache demand misses system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8448 # Number of cache demand accesses +system.ruby.dir_cntrl0.memBuffer.memReq 3456 # Total number of memory requests +system.ruby.dir_cntrl0.memBuffer.memRead 1730 # Number of memory reads +system.ruby.dir_cntrl0.memBuffer.memWrite 1726 # Number of memory writes +system.ruby.dir_cntrl0.memBuffer.memRefresh 999 # Number of memory refreshes +system.ruby.dir_cntrl0.memBuffer.memWaitCycles 3037 # Delay stalled at the head of the bank queue +system.ruby.dir_cntrl0.memBuffer.memBankQ 11 # Delay behind the head of the bank queue +system.ruby.dir_cntrl0.memBuffer.totalStalls 3048 # Total number of stall cycles +system.ruby.dir_cntrl0.memBuffer.stallsPerReq 0.881944 # Expected number of stall cycles per request +system.ruby.dir_cntrl0.memBuffer.memBankBusy 1500 # memory stalls due to busy bank +system.ruby.dir_cntrl0.memBuffer.memBusBusy 1375 # memory stalls due to busy bus +system.ruby.dir_cntrl0.memBuffer.memReadWriteBusy 55 # memory stalls due to read write turnaround +system.ruby.dir_cntrl0.memBuffer.memArbWait 107 # memory stalls due to arbitration +system.ruby.dir_cntrl0.memBuffer.memBankCount | 162 4.69% 4.69% | 36 1.04% 5.73% | 92 2.66% 8.39% | 110 3.18% 11.57% | 106 3.07% 14.64% | 362 10.47% 25.12% | 98 2.84% 27.95% | 36 1.04% 28.99% | 32 0.93% 29.92% | 34 0.98% 30.90% | 83 2.40% 33.30% | 92 2.66% 35.97% | 110 3.18% 39.15% | 104 3.01% 42.16% | 84 2.43% 44.59% | 86 2.49% 47.08% | 83 2.40% 49.48% | 53 1.53% 51.01% | 50 1.45% 52.46% | 58 1.68% 54.14% | 64 1.85% 55.99% | 124 3.59% 59.58% | 212 6.13% 65.71% | 72 2.08% 67.80% | 66 1.91% 69.70% | 50 1.45% 71.15% | 122 3.53% 74.68% | 190 5.50% 80.18% | 220 6.37% 86.55% | 325 9.40% 95.95% | 42 1.22% 97.16% | 98 2.84% 100.00% # Number of accesses per bank +system.ruby.dir_cntrl0.memBuffer.memBankCount::total 3456 # Number of accesses per bank + system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -69,5 +84,29 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 143853 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles +system.ruby.l1_cntrl0.Load 1183 0.00% 0.00% +system.ruby.l1_cntrl0.Ifetch 6400 0.00% 0.00% +system.ruby.l1_cntrl0.Store 865 0.00% 0.00% +system.ruby.l1_cntrl0.Data 1730 0.00% 0.00% +system.ruby.l1_cntrl0.Replacement 1726 0.00% 0.00% +system.ruby.l1_cntrl0.Writeback_Ack 1726 0.00% 0.00% +system.ruby.l1_cntrl0.I.Load 727 0.00% 0.00% +system.ruby.l1_cntrl0.I.Ifetch 730 0.00% 0.00% +system.ruby.l1_cntrl0.I.Store 273 0.00% 0.00% +system.ruby.l1_cntrl0.M.Load 456 0.00% 0.00% +system.ruby.l1_cntrl0.M.Ifetch 5670 0.00% 0.00% +system.ruby.l1_cntrl0.M.Store 592 0.00% 0.00% +system.ruby.l1_cntrl0.M.Replacement 1726 0.00% 0.00% +system.ruby.l1_cntrl0.MI.Writeback_Ack 1726 0.00% 0.00% +system.ruby.l1_cntrl0.IS.Data 1457 0.00% 0.00% +system.ruby.l1_cntrl0.IM.Data 273 0.00% 0.00% +system.ruby.dir_cntrl0.GETX 1730 0.00% 0.00% +system.ruby.dir_cntrl0.PUTX 1726 0.00% 0.00% +system.ruby.dir_cntrl0.Memory_Data 1730 0.00% 0.00% +system.ruby.dir_cntrl0.Memory_Ack 1726 0.00% 0.00% +system.ruby.dir_cntrl0.I.GETX 1730 0.00% 0.00% +system.ruby.dir_cntrl0.M.PUTX 1726 0.00% 0.00% +system.ruby.dir_cntrl0.IM.Memory_Data 1730 0.00% 0.00% +system.ruby.dir_cntrl0.MI.Memory_Ack 1726 0.00% 0.00% ---------- End Simulation Statistics ---------- |