diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/minor-timing')
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini | 17 | ||||
-rwxr-xr-x | tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simerr | 1 | ||||
-rwxr-xr-x[-rw-r--r--] | tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simout | 11 | ||||
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt | 10 |
4 files changed, 28 insertions, 11 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini index 8a6e8b486..4b9cee722 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= @@ -130,6 +131,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -146,6 +148,7 @@ system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] @@ -553,6 +556,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -569,6 +573,7 @@ system=system tags=system.cpu.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] @@ -602,6 +607,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -618,6 +624,7 @@ system=system tags=system.cpu.l2cache.tags tgts_per_mshr=12 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -633,12 +640,13 @@ size=2097152 [system.cpu.toL2Bus] type=CoherentXBar +children=snoop_filter clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 response_latency=1 -snoop_filter=Null +snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false @@ -646,6 +654,13 @@ width=32 master=system.cpu.l2cache.cpu_side slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + [system.cpu.tracer] type=ExeTracer eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simerr index 0b3033cd9..c6957696d 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simerr @@ -1,2 +1,3 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simout b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simout index 226c0e256..5008f8610 100644..100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/simout @@ -3,12 +3,13 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor- gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled May 7 2014 10:41:53 -gem5 started May 7 2014 15:04:23 -gem5 executing on cz3212c2d7 -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing +gem5 compiled Nov 15 2015 14:28:00 +gem5 started Nov 15 2015 14:29:19 +gem5 executing on ribera.cs.wisc.edu, pid 29096 +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 18715000 because target called exit() +Exiting @ tick 20075000 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt index a420f2b35..23e24ae54 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000020 # Nu sim_ticks 20075000 # Number of ticks simulated final_tick 20075000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 131673 # Simulator instruction rate (inst/s) -host_op_rate 131586 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1021264689 # Simulator tick rate (ticks/s) -host_mem_usage 295944 # Number of bytes of host memory used -host_seconds 0.02 # Real time elapsed on the host +host_inst_rate 43924 # Simulator instruction rate (inst/s) +host_op_rate 43910 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 340901575 # Simulator tick rate (ticks/s) +host_mem_usage 289896 # Number of bytes of host memory used +host_seconds 0.06 # Real time elapsed on the host sim_insts 2585 # Number of instructions simulated sim_ops 2585 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts |