diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt')
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt | 28 |
1 files changed, 5 insertions, 23 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt index 0bb4f7ab2..0b4d202c9 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000088 # Nu sim_ticks 87899 # Number of ticks simulated final_tick 87899 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 36684 # Simulator instruction rate (inst/s) -host_op_rate 36675 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1250644 # Simulator tick rate (ticks/s) -host_mem_usage 233044 # Number of bytes of host memory used -host_seconds 0.07 # Real time elapsed on the host +host_inst_rate 49141 # Simulator instruction rate (inst/s) +host_op_rate 49125 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1675041 # Simulator tick rate (ticks/s) +host_mem_usage 223232 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 10340 # Number of bytes read from this memory @@ -33,24 +33,6 @@ system.physmem.bw_write::total 23413236 # Wr system.physmem.bw_total::cpu.inst 117635013 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 57725344 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 175360357 # Total bandwidth to/from this memory (bytes/s) -system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads -system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes -system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads -system.l1_cntrl0.L1DcacheMemory.num_tag_array_writes 0 # number of tag array writes -system.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array -system.l1_cntrl0.L1DcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array -system.l1_cntrl0.L1IcacheMemory.num_data_array_reads 0 # number of data array reads -system.l1_cntrl0.L1IcacheMemory.num_data_array_writes 0 # number of data array writes -system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0 # number of tag array reads -system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes -system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array -system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array -system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads -system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes -system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads -system.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes -system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array -system.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv |