summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt16
1 files changed, 10 insertions, 6 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
index 4d9201d35..af200054c 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000035 # Nu
sim_ticks 35056 # Number of ticks simulated
final_tick 35056 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 50934 # Simulator instruction rate (inst/s)
-host_op_rate 50910 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 692254 # Simulator tick rate (ticks/s)
-host_mem_usage 411180 # Number of bytes of host memory used
-host_seconds 0.05 # Real time elapsed on the host
+host_inst_rate 89727 # Simulator instruction rate (inst/s)
+host_op_rate 89697 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1219820 # Simulator tick rate (ticks/s)
+host_mem_usage 412632 # Number of bytes of host memory used
+host_seconds 0.03 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -338,7 +338,9 @@ system.cpu.op_class::FloatAdd 0 0.00% 72.26% # Cl
system.cpu.op_class::FloatCmp 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 72.26% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 72.26% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 72.26% # Class of executed instruction
@@ -361,7 +363,9 @@ system.cpu.op_class::SimdFloatMult 0 0.00% 72.26% # Cl
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::MemRead 419 16.21% 88.47% # Class of executed instruction
-system.cpu.op_class::MemWrite 298 11.53% 100.00% # Class of executed instruction
+system.cpu.op_class::MemWrite 292 11.30% 99.77% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 0 0.00% 99.77% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 6 0.23% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 2585 # Class of executed instruction