diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt')
| -rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt | 654 |
1 files changed, 0 insertions, 654 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt deleted file mode 100644 index 38f9f0d34..000000000 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt +++ /dev/null @@ -1,654 +0,0 @@ - ----------- Begin Simulation Statistics ---------- -sim_seconds 0.000044 # Number of seconds simulated -sim_ticks 43520 # Number of ticks simulated -final_tick 43520 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 112756 # Simulator instruction rate (inst/s) -host_op_rate 112704 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1902499 # Simulator tick rate (ticks/s) -host_mem_usage 412460 # Number of bytes of host memory used -host_seconds 0.02 # Real time elapsed on the host -sim_insts 2577 # Number of instructions simulated -sim_ops 2577 # Number of ops (including micro ops) simulated -system.voltage_domain.voltage 1 # Voltage in Volts -system.clk_domain.clock 1 # Clock period in ticks -system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.mem_ctrls.bytes_read::ruby.dir_cntrl0 40064 # Number of bytes read from this memory -system.mem_ctrls.bytes_read::total 40064 # Number of bytes read from this memory -system.mem_ctrls.bytes_written::ruby.dir_cntrl0 39808 # Number of bytes written to this memory -system.mem_ctrls.bytes_written::total 39808 # Number of bytes written to this memory -system.mem_ctrls.num_reads::ruby.dir_cntrl0 626 # Number of read requests responded to by this memory -system.mem_ctrls.num_reads::total 626 # Number of read requests responded to by this memory -system.mem_ctrls.num_writes::ruby.dir_cntrl0 622 # Number of write requests responded to by this memory -system.mem_ctrls.num_writes::total 622 # Number of write requests responded to by this memory -system.mem_ctrls.bw_read::ruby.dir_cntrl0 920588235 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_read::total 920588235 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::ruby.dir_cntrl0 914705882 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::total 914705882 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_total::ruby.dir_cntrl0 1835294118 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.bw_total::total 1835294118 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.readReqs 626 # Number of read requests accepted -system.mem_ctrls.writeReqs 622 # Number of write requests accepted -system.mem_ctrls.readBursts 626 # Number of DRAM read bursts, including those serviced by the write queue -system.mem_ctrls.writeBursts 622 # Number of DRAM write bursts, including those merged in the write queue -system.mem_ctrls.bytesReadDRAM 24512 # Total number of bytes read from DRAM -system.mem_ctrls.bytesReadWrQ 15552 # Total number of bytes read from write queue -system.mem_ctrls.bytesWritten 23424 # Total number of bytes written to DRAM -system.mem_ctrls.bytesReadSys 40064 # Total read bytes from the system interface side -system.mem_ctrls.bytesWrittenSys 39808 # Total written bytes from the system interface side -system.mem_ctrls.servicedByWrQ 243 # Number of DRAM read bursts serviced by the write queue -system.mem_ctrls.mergedWrBursts 231 # Number of DRAM write bursts merged with an existing one -system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.mem_ctrls.perBankRdBursts::0 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::1 1 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::2 1 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::3 30 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::4 24 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::5 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::6 53 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::7 53 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::8 68 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::9 5 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::10 25 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::11 14 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::12 30 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::13 68 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::14 10 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::15 1 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::1 1 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::2 1 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::3 32 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::4 23 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::6 48 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::7 43 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::8 68 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::9 5 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::10 23 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::11 15 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::12 31 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::13 65 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::14 10 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::15 1 # Per bank write bursts -system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry -system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry -system.mem_ctrls.totGap 43487 # Total gap between requests -system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::6 626 # Read request sizes (log2) -system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::6 622 # Write request sizes (log2) -system.mem_ctrls.rdQLenPdf::0 383 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::16 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::17 17 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::18 23 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::19 23 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::20 26 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::21 28 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::22 24 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::23 23 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::24 23 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::25 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::26 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::27 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::28 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::29 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::30 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::31 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::32 22 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.mem_ctrls.bytesPerActivate::samples 113 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::mean 404.389381 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::gmean 273.588270 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::stdev 327.373952 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::0-127 20 17.70% 17.70% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::128-255 26 23.01% 40.71% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::256-383 16 14.16% 54.87% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::384-511 15 13.27% 68.14% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::512-639 5 4.42% 72.57% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::640-767 6 5.31% 77.88% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::768-895 8 7.08% 84.96% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::896-1023 5 4.42% 89.38% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::1024-1151 12 10.62% 100.00% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::total 113 # Bytes accessed per row activation -system.mem_ctrls.rdPerTurnAround::samples 22 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::mean 17 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::gmean 16.662586 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::stdev 4.253850 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::14-15 8 36.36% 36.36% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::16-17 8 36.36% 72.73% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::18-19 5 22.73% 95.45% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::34-35 1 4.55% 100.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::total 22 # Reads before turning the bus around for writes -system.mem_ctrls.wrPerTurnAround::samples 22 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::mean 16.636364 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::gmean 16.596436 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::stdev 1.216766 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::16 17 77.27% 77.27% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::18 1 4.55% 81.82% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::19 4 18.18% 100.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::total 22 # Writes before turning the bus around for reads -system.mem_ctrls.totQLat 6435 # Total ticks spent queuing -system.mem_ctrls.totMemAccLat 13712 # Total ticks spent from burst creation until serviced by the DRAM -system.mem_ctrls.totBusLat 1915 # Total ticks spent in databus transfers -system.mem_ctrls.avgQLat 16.80 # Average queueing delay per DRAM burst -system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst -system.mem_ctrls.avgMemAccLat 35.80 # Average memory access latency per DRAM burst -system.mem_ctrls.avgRdBW 563.24 # Average DRAM read bandwidth in MiByte/s -system.mem_ctrls.avgWrBW 538.24 # Average achieved write bandwidth in MiByte/s -system.mem_ctrls.avgRdBWSys 920.59 # Average system read bandwidth in MiByte/s -system.mem_ctrls.avgWrBWSys 914.71 # Average system write bandwidth in MiByte/s -system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.mem_ctrls.busUtil 8.61 # Data bus utilization in percentage -system.mem_ctrls.busUtilRead 4.40 # Data bus utilization in percentage for reads -system.mem_ctrls.busUtilWrite 4.20 # Data bus utilization in percentage for writes -system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing -system.mem_ctrls.avgWrQLen 24.70 # Average write queue length when enqueuing -system.mem_ctrls.readRowHits 286 # Number of row buffer hits during reads -system.mem_ctrls.writeRowHits 342 # Number of row buffer hits during writes -system.mem_ctrls.readRowHitRate 74.67 # Row buffer hit rate for reads -system.mem_ctrls.writeRowHitRate 87.47 # Row buffer hit rate for writes -system.mem_ctrls.avgGap 34.85 # Average gap between requests -system.mem_ctrls.pageHitRate 81.14 # Row buffer hit rate, read and write combined -system.mem_ctrls_0.actEnergy 264180 # Energy for activate commands per rank (pJ) -system.mem_ctrls_0.preEnergy 127512 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_0.readEnergy 1850688 # Energy for read commands per rank (pJ) -system.mem_ctrls_0.writeEnergy 1236096 # Energy for write commands per rank (pJ) -system.mem_ctrls_0.refreshEnergy 3073200.000000 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_0.actBackEnergy 3917040 # Energy for active background per rank (pJ) -system.mem_ctrls_0.preBackEnergy 69120 # Energy for precharge background per rank (pJ) -system.mem_ctrls_0.actPowerDownEnergy 15256848 # Energy for active power-down per rank (pJ) -system.mem_ctrls_0.prePowerDownEnergy 496128 # Energy for precharge power-down per rank (pJ) -system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) -system.mem_ctrls_0.totalEnergy 26290812 # Total energy per rank (pJ) -system.mem_ctrls_0.averagePower 604.108732 # Core power per rank (mW) -system.mem_ctrls_0.totalIdleTime 34684 # Total Idle time Per DRAM Rank -system.mem_ctrls_0.memoryStateTime::IDLE 40 # Time in different power states -system.mem_ctrls_0.memoryStateTime::REF 1300 # Time in different power states -system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states -system.mem_ctrls_0.memoryStateTime::PRE_PDN 1292 # Time in different power states -system.mem_ctrls_0.memoryStateTime::ACT 7430 # Time in different power states -system.mem_ctrls_0.memoryStateTime::ACT_PDN 33458 # Time in different power states -system.mem_ctrls_1.actEnergy 599760 # Energy for activate commands per rank (pJ) -system.mem_ctrls_1.preEnergy 309120 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_1.readEnergy 2524704 # Energy for read commands per rank (pJ) -system.mem_ctrls_1.writeEnergy 1820736 # Energy for write commands per rank (pJ) -system.mem_ctrls_1.refreshEnergy 3073200.000000 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_1.actBackEnergy 5746968 # Energy for active background per rank (pJ) -system.mem_ctrls_1.preBackEnergy 231168 # Energy for precharge background per rank (pJ) -system.mem_ctrls_1.actPowerDownEnergy 13781232 # Energy for active power-down per rank (pJ) -system.mem_ctrls_1.prePowerDownEnergy 35712 # Energy for precharge power-down per rank (pJ) -system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) -system.mem_ctrls_1.totalEnergy 28122600 # Total energy per rank (pJ) -system.mem_ctrls_1.averagePower 646.199449 # Core power per rank (mW) -system.mem_ctrls_1.totalIdleTime 29649 # Total Idle time Per DRAM Rank -system.mem_ctrls_1.memoryStateTime::IDLE 448 # Time in different power states -system.mem_ctrls_1.memoryStateTime::REF 1300 # Time in different power states -system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states -system.mem_ctrls_1.memoryStateTime::PRE_PDN 93 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT 11457 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT_PDN 30222 # Time in different power states -system.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.cpu.clk_domain.clock 1 # Clock period in ticks -system.cpu.dtb.fetch_hits 0 # ITB hits -system.cpu.dtb.fetch_misses 0 # ITB misses -system.cpu.dtb.fetch_acv 0 # ITB acv -system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.read_hits 415 # DTB read hits -system.cpu.dtb.read_misses 4 # DTB read misses -system.cpu.dtb.read_acv 0 # DTB read access violations -system.cpu.dtb.read_accesses 419 # DTB read accesses -system.cpu.dtb.write_hits 294 # DTB write hits -system.cpu.dtb.write_misses 4 # DTB write misses -system.cpu.dtb.write_acv 0 # DTB write access violations -system.cpu.dtb.write_accesses 298 # DTB write accesses -system.cpu.dtb.data_hits 709 # DTB hits -system.cpu.dtb.data_misses 8 # DTB misses -system.cpu.dtb.data_acv 0 # DTB access violations -system.cpu.dtb.data_accesses 717 # DTB accesses -system.cpu.itb.fetch_hits 2586 # ITB hits -system.cpu.itb.fetch_misses 11 # ITB misses -system.cpu.itb.fetch_acv 0 # ITB acv -system.cpu.itb.fetch_accesses 2597 # ITB accesses -system.cpu.itb.read_hits 0 # DTB read hits -system.cpu.itb.read_misses 0 # DTB read misses -system.cpu.itb.read_acv 0 # DTB read access violations -system.cpu.itb.read_accesses 0 # DTB read accesses -system.cpu.itb.write_hits 0 # DTB write hits -system.cpu.itb.write_misses 0 # DTB write misses -system.cpu.itb.write_acv 0 # DTB write access violations -system.cpu.itb.write_accesses 0 # DTB write accesses -system.cpu.itb.data_hits 0 # DTB hits -system.cpu.itb.data_misses 0 # DTB misses -system.cpu.itb.data_acv 0 # DTB access violations -system.cpu.itb.data_accesses 0 # DTB accesses -system.cpu.workload.num_syscalls 4 # Number of system calls -system.cpu.pwrStateResidencyTicks::ON 43520 # Cumulative time (in ticks) in various power states -system.cpu.numCycles 43520 # number of cpu cycles simulated -system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.committedInsts 2577 # Number of instructions committed -system.cpu.committedOps 2577 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 2375 # Number of integer alu accesses -system.cpu.num_fp_alu_accesses 6 # Number of float alu accesses -system.cpu.num_func_calls 140 # number of times a function call or return occured -system.cpu.num_conditional_control_insts 238 # number of instructions that are conditional controls -system.cpu.num_int_insts 2375 # number of integer instructions -system.cpu.num_fp_insts 6 # number of float instructions -system.cpu.num_int_register_reads 2998 # number of times the integer registers were read -system.cpu.num_int_register_writes 1768 # number of times the integer registers were written -system.cpu.num_fp_register_reads 6 # number of times the floating registers were read -system.cpu.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu.num_mem_refs 717 # number of memory refs -system.cpu.num_load_insts 419 # Number of load instructions -system.cpu.num_store_insts 298 # Number of store instructions -system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_busy_cycles 43520 # Number of busy cycles -system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.Branches 396 # Number of branches fetched -system.cpu.op_class::No_OpClass 189 7.31% 7.31% # Class of executed instruction -system.cpu.op_class::IntAlu 1678 64.91% 72.22% # Class of executed instruction -system.cpu.op_class::IntMult 1 0.04% 72.26% # Class of executed instruction -system.cpu.op_class::IntDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatMultAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatMisc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAddAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAlu 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMisc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMultAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdShift 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdShiftAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatAlu 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMisc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMultAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::MemRead 419 16.21% 88.47% # Class of executed instruction -system.cpu.op_class::MemWrite 292 11.30% 99.77% # Class of executed instruction -system.cpu.op_class::FloatMemRead 0 0.00% 99.77% # Class of executed instruction -system.cpu.op_class::FloatMemWrite 6 0.23% 100.00% # Class of executed instruction -system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::total 2585 # Class of executed instruction -system.ruby.clk_domain.clock 1 # Clock period in ticks -system.ruby.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.delayHist::bucket_size 1 # delay histogram for all message -system.ruby.delayHist::max_bucket 9 # delay histogram for all message -system.ruby.delayHist::samples 1248 # delay histogram for all message -system.ruby.delayHist | 1248 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message -system.ruby.delayHist::total 1248 # delay histogram for all message -system.ruby.outstanding_req_hist_seqr::bucket_size 1 -system.ruby.outstanding_req_hist_seqr::max_bucket 9 -system.ruby.outstanding_req_hist_seqr::samples 3295 -system.ruby.outstanding_req_hist_seqr::mean 1 -system.ruby.outstanding_req_hist_seqr::gmean 1 -system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 3295 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.outstanding_req_hist_seqr::total 3295 -system.ruby.latency_hist_seqr::bucket_size 64 -system.ruby.latency_hist_seqr::max_bucket 639 -system.ruby.latency_hist_seqr::samples 3294 -system.ruby.latency_hist_seqr::mean 12.211900 -system.ruby.latency_hist_seqr::gmean 2.131468 -system.ruby.latency_hist_seqr::stdev 27.594720 -system.ruby.latency_hist_seqr | 2924 88.77% 88.77% | 353 10.72% 99.48% | 12 0.36% 99.85% | 0 0.00% 99.85% | 2 0.06% 99.91% | 3 0.09% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.latency_hist_seqr::total 3294 -system.ruby.hit_latency_hist_seqr::bucket_size 1 -system.ruby.hit_latency_hist_seqr::max_bucket 9 -system.ruby.hit_latency_hist_seqr::samples 2668 -system.ruby.hit_latency_hist_seqr::mean 1 -system.ruby.hit_latency_hist_seqr::gmean 1 -system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 2668 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.hit_latency_hist_seqr::total 2668 -system.ruby.miss_latency_hist_seqr::bucket_size 64 -system.ruby.miss_latency_hist_seqr::max_bucket 639 -system.ruby.miss_latency_hist_seqr::samples 626 -system.ruby.miss_latency_hist_seqr::mean 59.996805 -system.ruby.miss_latency_hist_seqr::gmean 53.641558 -system.ruby.miss_latency_hist_seqr::stdev 34.472574 -system.ruby.miss_latency_hist_seqr | 256 40.89% 40.89% | 353 56.39% 97.28% | 12 1.92% 99.20% | 0 0.00% 99.20% | 2 0.32% 99.52% | 3 0.48% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.miss_latency_hist_seqr::total 626 -system.ruby.Directory.incomplete_times_seqr 625 -system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.l1_cntrl0.cacheMemory.demand_hits 2668 # Number of cache demand hits -system.ruby.l1_cntrl0.cacheMemory.demand_misses 626 # Number of cache demand misses -system.ruby.l1_cntrl0.cacheMemory.demand_accesses 3294 # Number of cache demand accesses -system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks -system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.network.routers0.percent_links_utilized 7.169118 -system.ruby.network.routers0.msg_count.Control::2 626 -system.ruby.network.routers0.msg_count.Data::2 622 -system.ruby.network.routers0.msg_count.Response_Data::4 626 -system.ruby.network.routers0.msg_count.Writeback_Control::3 622 -system.ruby.network.routers0.msg_bytes.Control::2 5008 -system.ruby.network.routers0.msg_bytes.Data::2 44784 -system.ruby.network.routers0.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers0.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.network.routers1.percent_links_utilized 7.169118 -system.ruby.network.routers1.msg_count.Control::2 626 -system.ruby.network.routers1.msg_count.Data::2 622 -system.ruby.network.routers1.msg_count.Response_Data::4 626 -system.ruby.network.routers1.msg_count.Writeback_Control::3 622 -system.ruby.network.routers1.msg_bytes.Control::2 5008 -system.ruby.network.routers1.msg_bytes.Data::2 44784 -system.ruby.network.routers1.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers1.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.network.routers2.percent_links_utilized 7.169118 -system.ruby.network.routers2.msg_count.Control::2 626 -system.ruby.network.routers2.msg_count.Data::2 622 -system.ruby.network.routers2.msg_count.Response_Data::4 626 -system.ruby.network.routers2.msg_count.Writeback_Control::3 622 -system.ruby.network.routers2.msg_bytes.Control::2 5008 -system.ruby.network.routers2.msg_bytes.Data::2 44784 -system.ruby.network.routers2.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers2.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.network.msg_count.Control 1878 -system.ruby.network.msg_count.Data 1866 -system.ruby.network.msg_count.Response_Data 1878 -system.ruby.network.msg_count.Writeback_Control 1866 -system.ruby.network.msg_byte.Control 15024 -system.ruby.network.msg_byte.Data 134352 -system.ruby.network.msg_byte.Response_Data 135216 -system.ruby.network.msg_byte.Writeback_Control 14928 -system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 43520 # Cumulative time (in ticks) in various power states -system.ruby.network.routers0.throttle0.link_utilization 7.187500 -system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 626 -system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 622 -system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.routers0.throttle1.link_utilization 7.150735 -system.ruby.network.routers0.throttle1.msg_count.Control::2 626 -system.ruby.network.routers0.throttle1.msg_count.Data::2 622 -system.ruby.network.routers0.throttle1.msg_bytes.Control::2 5008 -system.ruby.network.routers0.throttle1.msg_bytes.Data::2 44784 -system.ruby.network.routers1.throttle0.link_utilization 7.150735 -system.ruby.network.routers1.throttle0.msg_count.Control::2 626 -system.ruby.network.routers1.throttle0.msg_count.Data::2 622 -system.ruby.network.routers1.throttle0.msg_bytes.Control::2 5008 -system.ruby.network.routers1.throttle0.msg_bytes.Data::2 44784 -system.ruby.network.routers1.throttle1.link_utilization 7.187500 -system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 626 -system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 622 -system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.routers2.throttle0.link_utilization 7.187500 -system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 626 -system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 622 -system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 45072 -system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 4976 -system.ruby.network.routers2.throttle1.link_utilization 7.150735 -system.ruby.network.routers2.throttle1.msg_count.Control::2 626 -system.ruby.network.routers2.throttle1.msg_count.Data::2 622 -system.ruby.network.routers2.throttle1.msg_bytes.Control::2 5008 -system.ruby.network.routers2.throttle1.msg_bytes.Data::2 44784 -system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::samples 626 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1 | 626 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::total 626 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::samples 622 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2 | 622 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::total 622 # delay histogram for vnet_2 -system.ruby.LD.latency_hist_seqr::bucket_size 64 -system.ruby.LD.latency_hist_seqr::max_bucket 639 -system.ruby.LD.latency_hist_seqr::samples 415 -system.ruby.LD.latency_hist_seqr::mean 33.354217 -system.ruby.LD.latency_hist_seqr::gmean 9.992707 -system.ruby.LD.latency_hist_seqr::stdev 38.395820 -system.ruby.LD.latency_hist_seqr | 297 71.57% 71.57% | 114 27.47% 99.04% | 2 0.48% 99.52% | 0 0.00% 99.52% | 0 0.00% 99.52% | 2 0.48% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.latency_hist_seqr::total 415 -system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 -system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 -system.ruby.LD.hit_latency_hist_seqr::samples 170 -system.ruby.LD.hit_latency_hist_seqr::mean 1 -system.ruby.LD.hit_latency_hist_seqr::gmean 1 -system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 170 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.hit_latency_hist_seqr::total 170 -system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 -system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 -system.ruby.LD.miss_latency_hist_seqr::samples 245 -system.ruby.LD.miss_latency_hist_seqr::mean 55.804082 -system.ruby.LD.miss_latency_hist_seqr::gmean 49.356103 -system.ruby.LD.miss_latency_hist_seqr::stdev 35.580698 -system.ruby.LD.miss_latency_hist_seqr | 127 51.84% 51.84% | 114 46.53% 98.37% | 2 0.82% 99.18% | 0 0.00% 99.18% | 0 0.00% 99.18% | 2 0.82% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.miss_latency_hist_seqr::total 245 -system.ruby.ST.latency_hist_seqr::bucket_size 32 -system.ruby.ST.latency_hist_seqr::max_bucket 319 -system.ruby.ST.latency_hist_seqr::samples 294 -system.ruby.ST.latency_hist_seqr::mean 16.173469 -system.ruby.ST.latency_hist_seqr::gmean 3.033104 -system.ruby.ST.latency_hist_seqr::stdev 28.208400 -system.ruby.ST.latency_hist_seqr | 210 71.43% 71.43% | 44 14.97% 86.39% | 36 12.24% 98.64% | 1 0.34% 98.98% | 2 0.68% 99.66% | 1 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.latency_hist_seqr::total 294 -system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 -system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 -system.ruby.ST.hit_latency_hist_seqr::samples 210 -system.ruby.ST.hit_latency_hist_seqr::mean 1 -system.ruby.ST.hit_latency_hist_seqr::gmean 1 -system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 210 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.hit_latency_hist_seqr::total 210 -system.ruby.ST.miss_latency_hist_seqr::bucket_size 32 -system.ruby.ST.miss_latency_hist_seqr::max_bucket 319 -system.ruby.ST.miss_latency_hist_seqr::samples 84 -system.ruby.ST.miss_latency_hist_seqr::mean 54.107143 -system.ruby.ST.miss_latency_hist_seqr::gmean 48.596564 -system.ruby.ST.miss_latency_hist_seqr::stdev 27.751487 -system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 44 52.38% 52.38% | 36 42.86% 95.24% | 1 1.19% 96.43% | 2 2.38% 98.81% | 1 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.miss_latency_hist_seqr::total 84 -system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 -system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 -system.ruby.IFETCH.latency_hist_seqr::samples 2585 -system.ruby.IFETCH.latency_hist_seqr::mean 8.367118 -system.ruby.IFETCH.latency_hist_seqr::gmean 1.597827 -system.ruby.IFETCH.latency_hist_seqr::stdev 23.571466 -system.ruby.IFETCH.latency_hist_seqr | 2373 91.80% 91.80% | 202 7.81% 99.61% | 7 0.27% 99.88% | 0 0.00% 99.88% | 2 0.08% 99.96% | 1 0.04% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.latency_hist_seqr::total 2585 -system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 -system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 -system.ruby.IFETCH.hit_latency_hist_seqr::samples 2288 -system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 -system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 -system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 2288 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.hit_latency_hist_seqr::total 2288 -system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 -system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 -system.ruby.IFETCH.miss_latency_hist_seqr::samples 297 -system.ruby.IFETCH.miss_latency_hist_seqr::mean 65.121212 -system.ruby.IFETCH.miss_latency_hist_seqr::gmean 59.083052 -system.ruby.IFETCH.miss_latency_hist_seqr::stdev 34.625488 -system.ruby.IFETCH.miss_latency_hist_seqr | 85 28.62% 28.62% | 202 68.01% 96.63% | 7 2.36% 98.99% | 0 0.00% 98.99% | 2 0.67% 99.66% | 1 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.miss_latency_hist_seqr::total 297 -system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 -system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 -system.ruby.Directory.miss_mach_latency_hist_seqr::samples 626 -system.ruby.Directory.miss_mach_latency_hist_seqr::mean 59.996805 -system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 53.641558 -system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 34.472574 -system.ruby.Directory.miss_mach_latency_hist_seqr | 256 40.89% 40.89% | 353 56.39% 97.28% | 12 1.92% 99.20% | 0 0.00% 99.20% | 2 0.32% 99.52% | 3 0.48% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Directory.miss_mach_latency_hist_seqr::total 626 -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9 -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1 -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1 -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1 -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9 -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1 -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% -system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 245 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 55.804082 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 49.356103 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 35.580698 -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 127 51.84% 51.84% | 114 46.53% 98.37% | 2 0.82% 99.18% | 0 0.00% 99.18% | 0 0.00% 99.18% | 2 0.82% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 245 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 84 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 54.107143 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 48.596564 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 27.751487 -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 44 52.38% 52.38% | 36 42.86% 95.24% | 1 1.19% 96.43% | 2 2.38% 98.81% | 1 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 84 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 297 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 65.121212 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 59.083052 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 34.625488 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 85 28.62% 28.62% | 202 68.01% 96.63% | 7 2.36% 98.99% | 0 0.00% 98.99% | 2 0.67% 99.66% | 1 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 297 -system.ruby.Directory_Controller.GETX 626 0.00% 0.00% -system.ruby.Directory_Controller.PUTX 622 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Data 626 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Ack 622 0.00% 0.00% -system.ruby.Directory_Controller.I.GETX 626 0.00% 0.00% -system.ruby.Directory_Controller.M.PUTX 622 0.00% 0.00% -system.ruby.Directory_Controller.IM.Memory_Data 626 0.00% 0.00% -system.ruby.Directory_Controller.MI.Memory_Ack 622 0.00% 0.00% -system.ruby.L1Cache_Controller.Load 415 0.00% 0.00% -system.ruby.L1Cache_Controller.Ifetch 2585 0.00% 0.00% -system.ruby.L1Cache_Controller.Store 294 0.00% 0.00% -system.ruby.L1Cache_Controller.Data 626 0.00% 0.00% -system.ruby.L1Cache_Controller.Replacement 622 0.00% 0.00% -system.ruby.L1Cache_Controller.Writeback_Ack 622 0.00% 0.00% -system.ruby.L1Cache_Controller.I.Load 245 0.00% 0.00% -system.ruby.L1Cache_Controller.I.Ifetch 297 0.00% 0.00% -system.ruby.L1Cache_Controller.I.Store 84 0.00% 0.00% -system.ruby.L1Cache_Controller.M.Load 170 0.00% 0.00% -system.ruby.L1Cache_Controller.M.Ifetch 2288 0.00% 0.00% -system.ruby.L1Cache_Controller.M.Store 210 0.00% 0.00% -system.ruby.L1Cache_Controller.M.Replacement 622 0.00% 0.00% -system.ruby.L1Cache_Controller.MI.Writeback_Ack 622 0.00% 0.00% -system.ruby.L1Cache_Controller.IS.Data 542 0.00% 0.00% -system.ruby.L1Cache_Controller.IM.Data 84 0.00% 0.00% - ----------- End Simulation Statistics ---------- |