summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/alpha
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt93
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt93
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt84
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt93
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt84
5 files changed, 225 insertions, 222 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
index 9728f1e09..dde2aed4b 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000025 # Nu
sim_ticks 25046000 # Number of ticks simulated
final_tick 25046000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 25238 # Simulator instruction rate (inst/s)
-host_op_rate 25236 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 98905790 # Simulator tick rate (ticks/s)
-host_mem_usage 225424 # Number of bytes of host memory used
-host_seconds 0.25 # Real time elapsed on the host
+host_inst_rate 22373 # Simulator instruction rate (inst/s)
+host_op_rate 22372 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 87684145 # Simulator tick rate (ticks/s)
+host_mem_usage 225308 # Number of bytes of host memory used
+host_seconds 0.29 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 19200 # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 766589475 # In
system.physmem.bw_total::cpu.inst 766589475 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 429290106 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 1195879582 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 469 # Total number of read requests seen
-system.physmem.writeReqs 0 # Total number of write requests seen
-system.physmem.cpureqs 469 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 469 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 469 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 29952 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 29952 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 65 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 29 # Track reads on a per bank basis
@@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 396 # Tr
system.membus.trans_dist::ReadResp 395 # Transaction distribution
system.membus.trans_dist::ReadExReq 73 # Transaction distribution
system.membus.trans_dist::ReadExResp 73 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 937 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 937 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 29952 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 29952 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 937 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 937 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 29952 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 29952 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 29952 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 559000 # Layer occupancy (ticks)
@@ -307,15 +308,15 @@ system.cpu.stage3.utilization 2.663047 # Pe
system.cpu.stage4.idleCycles 45635 # Number of cycles 0 instructions are processed.
system.cpu.stage4.runCycles 4458 # Number of cycles 1+ instructions are processed.
system.cpu.stage4.utilization 8.899447 # Percentage of cycles stage was utilized (processing insts).
-system.cpu.icache.tags.replacements 0 # number of replacements
-system.cpu.icache.tags.tagsinuse 141.294375 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 560 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 301 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 1.860465 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 141.294375 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.068991 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.068991 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 141.294375 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 560 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 301 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 1.860465 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 141.294375 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.068991 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.068991 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 560 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 560 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 560 # number of demand (read+write) hits
@@ -396,12 +397,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 397 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 396 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 603 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 336 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 939 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 19264 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 10752 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 30016 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 603 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 336 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 939 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 19264 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10752 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 30016 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 30016 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 235000 # Layer occupancy (ticks)
@@ -410,17 +411,17 @@ system.cpu.toL2Bus.respLayer0.occupancy 512750 # La
system.cpu.toL2Bus.respLayer0.utilization 2.0 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 278750 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%)
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 197.784355 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 395 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.002532 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.343624 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 56.440731 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 197.784355 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 395 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.002532 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.343624 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 56.440731 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004313 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001722 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.006036 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.006036 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits
@@ -535,15 +536,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 55479.235880
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 58120.535714 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56425.373134 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 103.103023 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 1601 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 9.529762 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 103.103023 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.025172 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.025172 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 103.103023 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 1601 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 9.529762 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 103.103023 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.025172 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.025172 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1086 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1086 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 515 # number of WriteReq hits
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
index 38483afa5..60f469d0d 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000021 # Nu
sim_ticks 20671000 # Number of ticks simulated
final_tick 20671000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 25591 # Simulator instruction rate (inst/s)
-host_op_rate 25589 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 83008053 # Simulator tick rate (ticks/s)
-host_mem_usage 227468 # Number of bytes of host memory used
-host_seconds 0.25 # Real time elapsed on the host
+host_inst_rate 24570 # Simulator instruction rate (inst/s)
+host_op_rate 24568 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 79697022 # Simulator tick rate (ticks/s)
+host_mem_usage 227340 # Number of bytes of host memory used
+host_seconds 0.26 # Real time elapsed on the host
sim_insts 6372 # Number of instructions simulated
sim_ops 6372 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 20032 # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 969087127 # In
system.physmem.bw_total::cpu.inst 969087127 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 538725751 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 1507812878 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 488 # Total number of read requests seen
-system.physmem.writeReqs 0 # Total number of write requests seen
-system.physmem.cpureqs 488 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 488 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 488 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 31168 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 31168 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 69 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 34 # Track reads on a per bank basis
@@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 415 # Tr
system.membus.trans_dist::ReadResp 414 # Transaction distribution
system.membus.trans_dist::ReadExReq 73 # Transaction distribution
system.membus.trans_dist::ReadExResp 73 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 975 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 975 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 31168 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 31168 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 975 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 975 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 31168 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 31168 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 31168 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 619500 # Layer occupancy (ticks)
@@ -511,12 +512,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 416 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 415 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 629 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 348 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 977 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 20096 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 11136 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 31232 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 629 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 348 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 977 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20096 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 11136 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 31232 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 31232 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 244500 # Layer occupancy (ticks)
@@ -525,15 +526,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 531250 # La
system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 281250 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%)
-system.cpu.icache.tags.replacements 0 # number of replacements
-system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 1898 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 1898 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 1898 # number of demand (read+write) hits
@@ -609,17 +610,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 67819.841270
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004863 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001820 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits
@@ -734,15 +735,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54395.700637
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1730 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1730 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 506 # number of WriteReq hits
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
index 2ce4c669d..6038d0a3c 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000033 # Nu
sim_ticks 32544000 # Number of ticks simulated
final_tick 32544000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 19861 # Simulator instruction rate (inst/s)
-host_op_rate 19860 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 101141711 # Simulator tick rate (ticks/s)
-host_mem_usage 224276 # Number of bytes of host memory used
-host_seconds 0.32 # Real time elapsed on the host
+host_inst_rate 27670 # Simulator instruction rate (inst/s)
+host_op_rate 27667 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 140894748 # Simulator tick rate (ticks/s)
+host_mem_usage 224272 # Number of bytes of host memory used
+host_seconds 0.23 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 17792 # Number of bytes read from this memory
@@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 373 # Tr
system.membus.trans_dist::ReadResp 373 # Transaction distribution
system.membus.trans_dist::ReadExReq 73 # Transaction distribution
system.membus.trans_dist::ReadExResp 73 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 892 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 892 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28544 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 28544 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 892 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 892 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28544 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 28544 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 28544 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 446000 # Layer occupancy (ticks)
@@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 65088 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 0 # number of replacements
-system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 279 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 21.942652 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 127.998991 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.062500 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.062500 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 279 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 21.942652 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 127.998991 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.062500 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.062500 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 6122 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 6122 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 6122 # number of demand (read+write) hits
@@ -175,17 +175,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52849.462366
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52849.462366 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 52849.462366 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 184.497210 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 373 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.002681 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 128.017765 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 56.479444 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 184.497210 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 373 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.002681 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 128.017765 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 56.479444 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003907 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001724 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.005630 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.005630 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits
@@ -300,15 +300,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 103.762109 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 1880 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 11.190476 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 103.762109 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.025333 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.025333 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 103.762109 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 1880 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 11.190476 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 103.762109 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.025333 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.025333 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1088 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1088 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 792 # number of WriteReq hits
@@ -403,12 +403,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 374 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 374 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 558 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 336 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 894 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 17856 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 10752 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 28608 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 558 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 336 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 894 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 17856 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10752 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 28608 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 28608 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 223500 # Layer occupancy (ticks)
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
index 07e82d1ad..746096984 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000012 # Nu
sim_ticks 11933500 # Number of ticks simulated
final_tick 11933500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 492 # Simulator instruction rate (inst/s)
-host_op_rate 492 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2461163 # Simulator tick rate (ticks/s)
-host_mem_usage 226156 # Number of bytes of host memory used
-host_seconds 4.85 # Real time elapsed on the host
+host_inst_rate 64 # Simulator instruction rate (inst/s)
+host_op_rate 64 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 321705 # Simulator tick rate (ticks/s)
+host_mem_usage 226036 # Number of bytes of host memory used
+host_seconds 37.09 # Real time elapsed on the host
sim_insts 2387 # Number of instructions simulated
sim_ops 2387 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 12032 # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1008254075 # In
system.physmem.bw_total::cpu.inst 1008254075 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 455859555 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 1464113630 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 273 # Total number of read requests seen
-system.physmem.writeReqs 0 # Total number of write requests seen
-system.physmem.cpureqs 273 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 273 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 273 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 17472 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 17472 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 1 # Track reads on a per bank basis
@@ -190,10 +191,10 @@ system.membus.trans_dist::ReadReq 249 # Tr
system.membus.trans_dist::ReadResp 249 # Transaction distribution
system.membus.trans_dist::ReadExReq 24 # Transaction distribution
system.membus.trans_dist::ReadExResp 24 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 546 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 546 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 17472 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 17472 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 546 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 546 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17472 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 17472 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 17472 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 344000 # Layer occupancy (ticks)
@@ -507,12 +508,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 249 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 249 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 24 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 24 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 376 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 170 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 546 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 12032 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 5440 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 17472 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 376 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 170 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 546 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 12032 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5440 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 17472 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 17472 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 136500 # Layer occupancy (ticks)
@@ -521,15 +522,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 318000 # La
system.cpu.toL2Bus.respLayer0.utilization 2.7 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 135500 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%)
-system.cpu.icache.tags.replacements 0 # number of replacements
-system.cpu.icache.tags.tagsinuse 91.523450 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 816 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 188 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 4.340426 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 91.523450 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.044689 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.044689 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 91.523450 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 816 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 188 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 4.340426 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 91.523450 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.044689 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.044689 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 816 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 816 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 816 # number of demand (read+write) hits
@@ -605,17 +606,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 68062.494681
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 68062.494681 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 68062.494681 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 119.912589 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 249 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 91.722261 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 28.190328 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 119.912589 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 249 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 91.722261 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 28.190328 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.002799 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.000860 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.003659 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.003659 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_misses::cpu.inst 188 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::cpu.data 61 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::total 249 # number of ReadReq misses
@@ -724,15 +725,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54438.829787
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61447.058824 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56620.879121 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 44.879167 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 758 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 85 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 8.917647 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 44.879167 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.010957 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.010957 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 44.879167 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 758 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 85 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 8.917647 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 44.879167 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.010957 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.010957 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 545 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 545 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 213 # number of WriteReq hits
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt
index 034aea3e9..0eefef01d 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000017 # Nu
sim_ticks 16524000 # Number of ticks simulated
final_tick 16524000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 252355 # Simulator instruction rate (inst/s)
-host_op_rate 251860 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1611932908 # Simulator tick rate (ticks/s)
-host_mem_usage 223992 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 70 # Simulator instruction rate (inst/s)
+host_op_rate 70 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 446596 # Simulator tick rate (ticks/s)
+host_mem_usage 222964 # Number of bytes of host memory used
+host_seconds 37.00 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 10432 # Number of bytes read from this memory
@@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 218 # Tr
system.membus.trans_dist::ReadResp 218 # Transaction distribution
system.membus.trans_dist::ReadExReq 27 # Transaction distribution
system.membus.trans_dist::ReadExResp 27 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 490 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 490 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15680 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 15680 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 490 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 490 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15680 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 15680 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 15680 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 245000 # Layer occupancy (ticks)
@@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 33048 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 0 # number of replacements
-system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 163 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 14.865031 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 80.050296 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.039087 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.039087 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 163 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 14.865031 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 80.050296 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.039087 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.039087 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 2423 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 2423 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 2423 # number of demand (read+write) hits
@@ -175,17 +175,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 53000
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 53000 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 107.162861 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 218 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 80.168669 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 26.994192 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 107.162861 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 218 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 80.168669 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 26.994192 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.002447 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.000824 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.003270 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.003270 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_misses::cpu.inst 163 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::cpu.data 55 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::total 218 # number of ReadReq misses
@@ -294,15 +294,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 47.437790 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 627 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 82 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 7.646341 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 47.437790 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.011581 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.011581 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 47.437790 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 627 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 82 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 7.646341 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 47.437790 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.011581 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.011581 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 360 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 360 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 267 # number of WriteReq hits
@@ -397,12 +397,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 218 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 218 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 27 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 27 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 326 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 164 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 490 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 10432 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 5248 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 15680 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 326 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 164 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 490 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 10432 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5248 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 15680 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 15680 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 122500 # Layer occupancy (ticks)