diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/minor-timing')
-rw-r--r-- | tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini | 18 | ||||
-rwxr-xr-x[-rw-r--r--] | tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr | 1 | ||||
-rwxr-xr-x[-rw-r--r--] | tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout | 12 | ||||
-rw-r--r-- | tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt | 10 |
4 files changed, 29 insertions, 12 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini index 6229ef3c3..6eeda81d4 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= @@ -132,6 +133,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -148,6 +150,7 @@ system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] @@ -591,6 +594,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -607,6 +611,7 @@ system=system tags=system.cpu.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] @@ -626,6 +631,7 @@ eventq_index=0 [system.cpu.isa] type=ArmISA +decoderFlavour=Generic eventq_index=0 fpsid=1090793632 id_aa64afr0_el1=0 @@ -701,6 +707,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -717,6 +724,7 @@ system=system tags=system.cpu.l2cache.tags tgts_per_mshr=12 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -732,12 +740,13 @@ size=2097152 [system.cpu.toL2Bus] type=CoherentXBar +children=snoop_filter clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 response_latency=1 -snoop_filter=Null +snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false @@ -745,6 +754,13 @@ width=32 master=system.cpu.l2cache.cpu_side slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + [system.cpu.tracer] type=ExeTracer eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr index 1a4f96712..341b479f7 100644..100755 --- a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr +++ b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout index ccb773a26..dfde5d918 100644..100755 --- a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/simout @@ -3,12 +3,12 @@ Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timi gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled May 7 2014 10:57:46 -gem5 started May 7 2014 13:43:16 -gem5 executing on cz3211bhr8 -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing +gem5 compiled Nov 15 2015 15:24:37 +gem5 started Nov 15 2015 15:29:19 +gem5 executing on ribera.cs.wisc.edu, pid 11166 +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x6c0c360 info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 28041000 because target called exit() +Exiting @ tick 29949500 because target called exit() diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt index 084d8789f..7006e134f 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000030 # Nu sim_ticks 29949500 # Number of ticks simulated final_tick 29949500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 117235 # Simulator instruction rate (inst/s) -host_op_rate 137200 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 761957462 # Simulator tick rate (ticks/s) -host_mem_usage 313960 # Number of bytes of host memory used -host_seconds 0.04 # Real time elapsed on the host +host_inst_rate 53802 # Simulator instruction rate (inst/s) +host_op_rate 62972 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 349767389 # Simulator tick rate (ticks/s) +host_mem_usage 307220 # Number of bytes of host memory used +host_seconds 0.09 # Real time elapsed on the host sim_insts 4605 # Number of instructions simulated sim_ops 5391 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts |