diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout')
| -rwxr-xr-x | tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout index e4986f157..800acea54 100755 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout @@ -1,14 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout +Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Apr 22 2015 10:58:25 -gem5 started Apr 22 2015 14:33:28 -gem5 executing on phenom -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker +gem5 compiled Sep 14 2015 23:29:19 +gem5 started Sep 14 2015 23:30:05 +gem5 executing on ribera.cs.wisc.edu +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker Global frequency set at 1000000000000 ticks per second - 0: system.cpu.checker.isa: ISA system set to: 0 0x38f90a0 - 0: system.cpu.isa: ISA system set to: 0 0x38f90a0 info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 17307500 because target called exit() +Exiting @ tick 17163000 because target called exit() |