diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini')
-rw-r--r-- | tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini index baee5cb0e..a0f588ff6 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=checker dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=system.cpu.checker clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -107,6 +112,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.checker.tracer @@ -353,7 +359,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/test-progs/hello/bin/arm/linux/hello +executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -367,9 +373,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain |