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Diffstat (limited to 'tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini')
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini20
1 files changed, 17 insertions, 3 deletions
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
index d40656fb3..bb822211b 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
@@ -10,7 +10,7 @@ time_sync_spin_threshold=100000
[system]
type=System
-children=clk_domain cpu physmem ruby sys_port_proxy voltage_domain
+children=clk_domain cpu physmem piobus ruby sys_port_proxy voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
@@ -18,6 +18,7 @@ eventq_index=0
init_param=0
kernel=
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=0:268435455
memories=system.physmem
@@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
[system.cpu]
type=TimingSimpleCPU
children=clk_domain dtb interrupts isa itb tracer workload
+branchPred=Null
checker=Null
clk_domain=system.cpu.clk_domain
cpu_id=0
@@ -110,7 +112,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/hello/bin/mips/linux/hello
+executable=tests/test-progs/hello/bin/mips/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -133,6 +135,16 @@ latency_var=0
null=true
range=0:134217727
+[system.piobus]
+type=NoncoherentBus
+clk_domain=system.clk_domain
+eventq_index=0
+header_cycles=1
+use_default_range=false
+width=8
+master=system.ruby.l1_cntrl0.sequencer.pio_slave_port
+slave=system.ruby.l1_cntrl0.sequencer.pio_master_port system.ruby.l1_cntrl0.sequencer.mem_master_port
+
[system.ruby]
type=RubySystem
children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
@@ -252,6 +264,9 @@ system=system
using_network_tester=false
using_ruby_tester=false
version=0
+mem_master_port=system.piobus.slave[1]
+pio_master_port=system.piobus.slave[0]
+pio_slave_port=system.piobus.master[0]
slave=system.cpu.icache_port system.cpu.dcache_port
[system.ruby.memctrl_clk_domain]
@@ -346,7 +361,6 @@ ruby_system=system.ruby
support_data_reqs=true
support_inst_reqs=true
system=system
-using_network_tester=false
using_ruby_tester=false
version=0
slave=system.system_port