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Diffstat (limited to 'tests/quick/se/00.hello/ref/power')
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini875
-rwxr-xr-xtests/quick/se/00.hello/ref/power/linux/o3-timing/simerr4
-rwxr-xr-xtests/quick/se/00.hello/ref/power/linux/o3-timing/simout13
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt1012
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini214
-rwxr-xr-xtests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr3
-rwxr-xr-xtests/quick/se/00.hello/ref/power/linux/simple-atomic/simout13
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt153
8 files changed, 0 insertions, 2287 deletions
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini
deleted file mode 100644
index c234169e9..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini
+++ /dev/null
@@ -1,875 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
-LFSTSize=1024
-LQEntries=32
-LSQCheckLoads=true
-LSQDepCheckShift=4
-SQEntries=32
-SSITSize=1024
-UnifiedTLB=true
-activity=0
-backComSize=5
-branchPred=system.cpu.branchPred
-cacheStorePorts=200
-checker=Null
-clk_domain=system.cpu_clk_domain
-commitToDecodeDelay=1
-commitToFetchDelay=1
-commitToIEWDelay=1
-commitToRenameDelay=1
-commitWidth=8
-cpu_id=0
-decodeToFetchDelay=1
-decodeToRenameDelay=1
-decodeWidth=8
-default_p_state=UNDEFINED
-dispatchWidth=8
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fetchBufferSize=64
-fetchQueueSize=32
-fetchToDecodeDelay=1
-fetchTrapLatency=1
-fetchWidth=8
-forwardComSize=5
-fuPool=system.cpu.fuPool
-function_trace=false
-function_trace_start=0
-iewToCommitDelay=1
-iewToDecodeDelay=1
-iewToFetchDelay=1
-iewToRenameDelay=1
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-issueToExecuteDelay=1
-issueWidth=8
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-needsTSO=false
-numIQEntries=64
-numPhysCCRegs=0
-numPhysFloatRegs=256
-numPhysIntRegs=256
-numROBEntries=192
-numRobs=1
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-renameToDecodeDelay=1
-renameToFetchDelay=1
-renameToIEWDelay=2
-renameToROBDelay=1
-renameWidth=8
-simpoint_start_insts=
-smtCommitPolicy=RoundRobin
-smtFetchPolicy=SingleThread
-smtIQPolicy=Partitioned
-smtIQThreshold=100
-smtLSQPolicy=Partitioned
-smtLSQThreshold=100
-smtNumFetchingThreads=1
-smtROBPolicy=Partitioned
-smtROBThreshold=100
-socket_id=0
-squashWidth=8
-store_set_clear_period=250000
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-trapLatency=13
-wbWidth=8
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.fuPool]
-type=FUPool
-children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
-FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
-eventq_index=0
-
-[system.cpu.fuPool.FUList0]
-type=FUDesc
-children=opList
-count=6
-eventq_index=0
-opList=system.cpu.fuPool.FUList0.opList
-
-[system.cpu.fuPool.FUList0.opList]
-type=OpDesc
-eventq_index=0
-opClass=IntAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList1]
-type=FUDesc
-children=opList0 opList1
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
-
-[system.cpu.fuPool.FUList1.opList0]
-type=OpDesc
-eventq_index=0
-opClass=IntMult
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList1.opList1]
-type=OpDesc
-eventq_index=0
-opClass=IntDiv
-opLat=20
-pipelined=false
-
-[system.cpu.fuPool.FUList2]
-type=FUDesc
-children=opList0 opList1 opList2
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
-
-[system.cpu.fuPool.FUList2.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatAdd
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatCmp
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList2.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatCvt
-opLat=2
-pipelined=true
-
-[system.cpu.fuPool.FUList3]
-type=FUDesc
-children=opList0 opList1 opList2 opList3 opList4
-count=2
-eventq_index=0
-opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4
-
-[system.cpu.fuPool.FUList3.opList0]
-type=OpDesc
-eventq_index=0
-opClass=FloatMult
-opLat=4
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMultAcc
-opLat=5
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMisc
-opLat=3
-pipelined=true
-
-[system.cpu.fuPool.FUList3.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatDiv
-opLat=12
-pipelined=false
-
-[system.cpu.fuPool.FUList3.opList4]
-type=OpDesc
-eventq_index=0
-opClass=FloatSqrt
-opLat=24
-pipelined=false
-
-[system.cpu.fuPool.FUList4]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1
-
-[system.cpu.fuPool.FUList4.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList4.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5]
-type=FUDesc
-children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
-
-[system.cpu.fuPool.FUList5.opList00]
-type=OpDesc
-eventq_index=0
-opClass=SimdAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList01]
-type=OpDesc
-eventq_index=0
-opClass=SimdAddAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList02]
-type=OpDesc
-eventq_index=0
-opClass=SimdAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList03]
-type=OpDesc
-eventq_index=0
-opClass=SimdCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList04]
-type=OpDesc
-eventq_index=0
-opClass=SimdCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList05]
-type=OpDesc
-eventq_index=0
-opClass=SimdMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList06]
-type=OpDesc
-eventq_index=0
-opClass=SimdMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList07]
-type=OpDesc
-eventq_index=0
-opClass=SimdMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList08]
-type=OpDesc
-eventq_index=0
-opClass=SimdShift
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList09]
-type=OpDesc
-eventq_index=0
-opClass=SimdShiftAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList10]
-type=OpDesc
-eventq_index=0
-opClass=SimdSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList11]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAdd
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList12]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatAlu
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList13]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCmp
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList14]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatCvt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList15]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatDiv
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList16]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMisc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList17]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMult
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList18]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatMultAcc
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList5.opList19]
-type=OpDesc
-eventq_index=0
-opClass=SimdFloatSqrt
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6]
-type=FUDesc
-children=opList0 opList1
-count=0
-eventq_index=0
-opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
-
-[system.cpu.fuPool.FUList6.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList6.opList1]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7]
-type=FUDesc
-children=opList0 opList1 opList2 opList3
-count=4
-eventq_index=0
-opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3
-
-[system.cpu.fuPool.FUList7.opList0]
-type=OpDesc
-eventq_index=0
-opClass=MemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList1]
-type=OpDesc
-eventq_index=0
-opClass=MemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList2]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemRead
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList7.opList3]
-type=OpDesc
-eventq_index=0
-opClass=FloatMemWrite
-opLat=1
-pipelined=true
-
-[system.cpu.fuPool.FUList8]
-type=FUDesc
-children=opList
-count=1
-eventq_index=0
-opList=system.cpu.fuPool.FUList8.opList
-
-[system.cpu.fuPool.FUList8.opList]
-type=OpDesc
-eventq_index=0
-opClass=IprAccess
-opLat=3
-pipelined=false
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=PowerInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=PowerISA
-eventq_index=0
-
-[system.cpu.itb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/power/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr
deleted file mode 100755
index 707fed98b..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout
deleted file mode 100755
index a796e3972..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simout
-Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr 3 2017 19:22:30
-gem5 started Apr 3 2017 19:22:48
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 103796
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/power/linux/o3-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 21189000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
deleted file mode 100644
index 189de9f2f..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
+++ /dev/null
@@ -1,1012 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000021
-sim_ticks 21189000
-final_tick 21189000
-sim_freq 1000000000000
-host_inst_rate 70012
-host_op_rate 69995
-host_tick_rate 256014000
-host_mem_usage 260844
-host_seconds 0.08
-sim_insts 5792
-sim_ops 5792
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 21189000
-system.physmem.bytes_read::cpu.inst 21824
-system.physmem.bytes_read::cpu.data 6528
-system.physmem.bytes_read::total 28352
-system.physmem.bytes_inst_read::cpu.inst 21824
-system.physmem.bytes_inst_read::total 21824
-system.physmem.num_reads::cpu.inst 341
-system.physmem.num_reads::cpu.data 102
-system.physmem.num_reads::total 443
-system.physmem.bw_read::cpu.inst 1029968380
-system.physmem.bw_read::cpu.data 308084383
-system.physmem.bw_read::total 1338052763
-system.physmem.bw_inst_read::cpu.inst 1029968380
-system.physmem.bw_inst_read::total 1029968380
-system.physmem.bw_total::cpu.inst 1029968380
-system.physmem.bw_total::cpu.data 308084383
-system.physmem.bw_total::total 1338052763
-system.physmem.readReqs 444
-system.physmem.writeReqs 0
-system.physmem.readBursts 444
-system.physmem.writeBursts 0
-system.physmem.bytesReadDRAM 28416
-system.physmem.bytesReadWrQ 0
-system.physmem.bytesWritten 0
-system.physmem.bytesReadSys 28416
-system.physmem.bytesWrittenSys 0
-system.physmem.servicedByWrQ 0
-system.physmem.mergedWrBursts 0
-system.physmem.neitherReadNorWriteReqs 0
-system.physmem.perBankRdBursts::0 71
-system.physmem.perBankRdBursts::1 42
-system.physmem.perBankRdBursts::2 55
-system.physmem.perBankRdBursts::3 58
-system.physmem.perBankRdBursts::4 53
-system.physmem.perBankRdBursts::5 61
-system.physmem.perBankRdBursts::6 52
-system.physmem.perBankRdBursts::7 10
-system.physmem.perBankRdBursts::8 9
-system.physmem.perBankRdBursts::9 28
-system.physmem.perBankRdBursts::10 1
-system.physmem.perBankRdBursts::11 0
-system.physmem.perBankRdBursts::12 0
-system.physmem.perBankRdBursts::13 0
-system.physmem.perBankRdBursts::14 4
-system.physmem.perBankRdBursts::15 0
-system.physmem.perBankWrBursts::0 0
-system.physmem.perBankWrBursts::1 0
-system.physmem.perBankWrBursts::2 0
-system.physmem.perBankWrBursts::3 0
-system.physmem.perBankWrBursts::4 0
-system.physmem.perBankWrBursts::5 0
-system.physmem.perBankWrBursts::6 0
-system.physmem.perBankWrBursts::7 0
-system.physmem.perBankWrBursts::8 0
-system.physmem.perBankWrBursts::9 0
-system.physmem.perBankWrBursts::10 0
-system.physmem.perBankWrBursts::11 0
-system.physmem.perBankWrBursts::12 0
-system.physmem.perBankWrBursts::13 0
-system.physmem.perBankWrBursts::14 0
-system.physmem.perBankWrBursts::15 0
-system.physmem.numRdRetry 0
-system.physmem.numWrRetry 0
-system.physmem.totGap 21128500
-system.physmem.readPktSize::0 0
-system.physmem.readPktSize::1 0
-system.physmem.readPktSize::2 0
-system.physmem.readPktSize::3 0
-system.physmem.readPktSize::4 0
-system.physmem.readPktSize::5 0
-system.physmem.readPktSize::6 444
-system.physmem.writePktSize::0 0
-system.physmem.writePktSize::1 0
-system.physmem.writePktSize::2 0
-system.physmem.writePktSize::3 0
-system.physmem.writePktSize::4 0
-system.physmem.writePktSize::5 0
-system.physmem.writePktSize::6 0
-system.physmem.rdQLenPdf::0 235
-system.physmem.rdQLenPdf::1 144
-system.physmem.rdQLenPdf::2 45
-system.physmem.rdQLenPdf::3 14
-system.physmem.rdQLenPdf::4 5
-system.physmem.rdQLenPdf::5 1
-system.physmem.rdQLenPdf::6 0
-system.physmem.rdQLenPdf::7 0
-system.physmem.rdQLenPdf::8 0
-system.physmem.rdQLenPdf::9 0
-system.physmem.rdQLenPdf::10 0
-system.physmem.rdQLenPdf::11 0
-system.physmem.rdQLenPdf::12 0
-system.physmem.rdQLenPdf::13 0
-system.physmem.rdQLenPdf::14 0
-system.physmem.rdQLenPdf::15 0
-system.physmem.rdQLenPdf::16 0
-system.physmem.rdQLenPdf::17 0
-system.physmem.rdQLenPdf::18 0
-system.physmem.rdQLenPdf::19 0
-system.physmem.rdQLenPdf::20 0
-system.physmem.rdQLenPdf::21 0
-system.physmem.rdQLenPdf::22 0
-system.physmem.rdQLenPdf::23 0
-system.physmem.rdQLenPdf::24 0
-system.physmem.rdQLenPdf::25 0
-system.physmem.rdQLenPdf::26 0
-system.physmem.rdQLenPdf::27 0
-system.physmem.rdQLenPdf::28 0
-system.physmem.rdQLenPdf::29 0
-system.physmem.rdQLenPdf::30 0
-system.physmem.rdQLenPdf::31 0
-system.physmem.wrQLenPdf::0 0
-system.physmem.wrQLenPdf::1 0
-system.physmem.wrQLenPdf::2 0
-system.physmem.wrQLenPdf::3 0
-system.physmem.wrQLenPdf::4 0
-system.physmem.wrQLenPdf::5 0
-system.physmem.wrQLenPdf::6 0
-system.physmem.wrQLenPdf::7 0
-system.physmem.wrQLenPdf::8 0
-system.physmem.wrQLenPdf::9 0
-system.physmem.wrQLenPdf::10 0
-system.physmem.wrQLenPdf::11 0
-system.physmem.wrQLenPdf::12 0
-system.physmem.wrQLenPdf::13 0
-system.physmem.wrQLenPdf::14 0
-system.physmem.wrQLenPdf::15 0
-system.physmem.wrQLenPdf::16 0
-system.physmem.wrQLenPdf::17 0
-system.physmem.wrQLenPdf::18 0
-system.physmem.wrQLenPdf::19 0
-system.physmem.wrQLenPdf::20 0
-system.physmem.wrQLenPdf::21 0
-system.physmem.wrQLenPdf::22 0
-system.physmem.wrQLenPdf::23 0
-system.physmem.wrQLenPdf::24 0
-system.physmem.wrQLenPdf::25 0
-system.physmem.wrQLenPdf::26 0
-system.physmem.wrQLenPdf::27 0
-system.physmem.wrQLenPdf::28 0
-system.physmem.wrQLenPdf::29 0
-system.physmem.wrQLenPdf::30 0
-system.physmem.wrQLenPdf::31 0
-system.physmem.wrQLenPdf::32 0
-system.physmem.wrQLenPdf::33 0
-system.physmem.wrQLenPdf::34 0
-system.physmem.wrQLenPdf::35 0
-system.physmem.wrQLenPdf::36 0
-system.physmem.wrQLenPdf::37 0
-system.physmem.wrQLenPdf::38 0
-system.physmem.wrQLenPdf::39 0
-system.physmem.wrQLenPdf::40 0
-system.physmem.wrQLenPdf::41 0
-system.physmem.wrQLenPdf::42 0
-system.physmem.wrQLenPdf::43 0
-system.physmem.wrQLenPdf::44 0
-system.physmem.wrQLenPdf::45 0
-system.physmem.wrQLenPdf::46 0
-system.physmem.wrQLenPdf::47 0
-system.physmem.wrQLenPdf::48 0
-system.physmem.wrQLenPdf::49 0
-system.physmem.wrQLenPdf::50 0
-system.physmem.wrQLenPdf::51 0
-system.physmem.wrQLenPdf::52 0
-system.physmem.wrQLenPdf::53 0
-system.physmem.wrQLenPdf::54 0
-system.physmem.wrQLenPdf::55 0
-system.physmem.wrQLenPdf::56 0
-system.physmem.wrQLenPdf::57 0
-system.physmem.wrQLenPdf::58 0
-system.physmem.wrQLenPdf::59 0
-system.physmem.wrQLenPdf::60 0
-system.physmem.wrQLenPdf::61 0
-system.physmem.wrQLenPdf::62 0
-system.physmem.wrQLenPdf::63 0
-system.physmem.bytesPerActivate::samples 76
-system.physmem.bytesPerActivate::mean 348.631579
-system.physmem.bytesPerActivate::gmean 212.894378
-system.physmem.bytesPerActivate::stdev 337.912685
-system.physmem.bytesPerActivate::0-127 24 31.58% 31.58%
-system.physmem.bytesPerActivate::128-255 17 22.37% 53.95%
-system.physmem.bytesPerActivate::256-383 12 15.79% 69.74%
-system.physmem.bytesPerActivate::384-511 2 2.63% 72.37%
-system.physmem.bytesPerActivate::512-639 3 3.95% 76.32%
-system.physmem.bytesPerActivate::640-767 4 5.26% 81.58%
-system.physmem.bytesPerActivate::768-895 2 2.63% 84.21%
-system.physmem.bytesPerActivate::896-1023 3 3.95% 88.16%
-system.physmem.bytesPerActivate::1024-1151 9 11.84% 100.00%
-system.physmem.bytesPerActivate::total 76
-system.physmem.totQLat 5920000
-system.physmem.totMemAccLat 14245000
-system.physmem.totBusLat 2220000
-system.physmem.avgQLat 13333.33
-system.physmem.avgBusLat 5000.00
-system.physmem.avgMemAccLat 32083.33
-system.physmem.avgRdBW 1341.07
-system.physmem.avgWrBW 0.00
-system.physmem.avgRdBWSys 1341.07
-system.physmem.avgWrBWSys 0.00
-system.physmem.peakBW 12800.00
-system.physmem.busUtil 10.48
-system.physmem.busUtilRead 10.48
-system.physmem.busUtilWrite 0.00
-system.physmem.avgRdQLen 1.82
-system.physmem.avgWrQLen 0.00
-system.physmem.readRowHits 358
-system.physmem.writeRowHits 0
-system.physmem.readRowHitRate 80.63
-system.physmem.writeRowHitRate nan
-system.physmem.avgGap 47586.71
-system.physmem.pageHitRate 80.63
-system.physmem_0.actEnergy 528360
-system.physmem_0.preEnergy 254265
-system.physmem_0.readEnergy 2870280
-system.physmem_0.writeEnergy 0
-system.physmem_0.refreshEnergy 1229280.000000
-system.physmem_0.actBackEnergy 3925590
-system.physmem_0.preBackEnergy 28320
-system.physmem_0.actPowerDownEnergy 5657820
-system.physmem_0.prePowerDownEnergy 38400
-system.physmem_0.selfRefreshEnergy 0
-system.physmem_0.totalEnergy 14532315
-system.physmem_0.averagePower 685.810052
-system.physmem_0.totalIdleTime 12505250
-system.physmem_0.memoryStateTime::IDLE 17500
-system.physmem_0.memoryStateTime::REF 520000
-system.physmem_0.memoryStateTime::SREF 0
-system.physmem_0.memoryStateTime::PRE_PDN 100250
-system.physmem_0.memoryStateTime::ACT 8146250
-system.physmem_0.memoryStateTime::ACT_PDN 12405000
-system.physmem_1.actEnergy 85680
-system.physmem_1.preEnergy 34155
-system.physmem_1.readEnergy 299880
-system.physmem_1.writeEnergy 0
-system.physmem_1.refreshEnergy 1229280.000000
-system.physmem_1.actBackEnergy 759810
-system.physmem_1.preBackEnergy 1412160
-system.physmem_1.actPowerDownEnergy 6380010
-system.physmem_1.prePowerDownEnergy 712320
-system.physmem_1.selfRefreshEnergy 0
-system.physmem_1.totalEnergy 10913295
-system.physmem_1.averagePower 515.021000
-system.physmem_1.totalIdleTime 13660000
-system.physmem_1.memoryStateTime::IDLE 3594000
-system.physmem_1.memoryStateTime::REF 520000
-system.physmem_1.memoryStateTime::SREF 0
-system.physmem_1.memoryStateTime::PRE_PDN 1854750
-system.physmem_1.memoryStateTime::ACT 1229000
-system.physmem_1.memoryStateTime::ACT_PDN 13991250
-system.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.branchPred.lookups 2458
-system.cpu.branchPred.condPredicted 2033
-system.cpu.branchPred.condIncorrect 409
-system.cpu.branchPred.BTBLookups 2104
-system.cpu.branchPred.BTBHits 724
-system.cpu.branchPred.BTBCorrect 0
-system.cpu.branchPred.BTBHitPct 34.410646
-system.cpu.branchPred.usedRAS 228
-system.cpu.branchPred.RASInCorrect 36
-system.cpu.branchPred.indirectLookups 135
-system.cpu.branchPred.indirectHits 18
-system.cpu.branchPred.indirectMisses 117
-system.cpu.branchPredindirectMispredicted 37
-system.cpu_clk_domain.clock 500
-system.cpu.dtb.read_hits 0
-system.cpu.dtb.read_misses 0
-system.cpu.dtb.read_accesses 0
-system.cpu.dtb.write_hits 0
-system.cpu.dtb.write_misses 0
-system.cpu.dtb.write_accesses 0
-system.cpu.dtb.hits 0
-system.cpu.dtb.misses 0
-system.cpu.dtb.accesses 0
-system.cpu.itb.read_hits 0
-system.cpu.itb.read_misses 0
-system.cpu.itb.read_accesses 0
-system.cpu.itb.write_hits 0
-system.cpu.itb.write_misses 0
-system.cpu.itb.write_accesses 0
-system.cpu.itb.hits 0
-system.cpu.itb.misses 0
-system.cpu.itb.accesses 0
-system.cpu.workload.numSyscalls 9
-system.cpu.pwrStateResidencyTicks::ON 21189000
-system.cpu.numCycles 42379
-system.cpu.numWorkItemsStarted 0
-system.cpu.numWorkItemsCompleted 0
-system.cpu.fetch.icacheStallCycles 7639
-system.cpu.fetch.Insts 13455
-system.cpu.fetch.Branches 2458
-system.cpu.fetch.predictedBranches 970
-system.cpu.fetch.Cycles 4277
-system.cpu.fetch.SquashCycles 846
-system.cpu.fetch.MiscStallCycles 5
-system.cpu.fetch.PendingTrapStallCycles 146
-system.cpu.fetch.IcacheWaitRetryStallCycles 22
-system.cpu.fetch.CacheLines 1865
-system.cpu.fetch.IcacheSquashes 287
-system.cpu.fetch.rateDist::samples 12512
-system.cpu.fetch.rateDist::mean 1.075368
-system.cpu.fetch.rateDist::stdev 2.471061
-system.cpu.fetch.rateDist::underflows 0 0.00% 0.00%
-system.cpu.fetch.rateDist::0 10164 81.23% 81.23%
-system.cpu.fetch.rateDist::1 163 1.30% 82.54%
-system.cpu.fetch.rateDist::2 210 1.68% 84.22%
-system.cpu.fetch.rateDist::3 146 1.17% 85.38%
-system.cpu.fetch.rateDist::4 247 1.97% 87.36%
-system.cpu.fetch.rateDist::5 148 1.18% 88.54%
-system.cpu.fetch.rateDist::6 304 2.43% 90.97%
-system.cpu.fetch.rateDist::7 158 1.26% 92.23%
-system.cpu.fetch.rateDist::8 972 7.77% 100.00%
-system.cpu.fetch.rateDist::overflows 0 0.00% 100.00%
-system.cpu.fetch.rateDist::min_value 0
-system.cpu.fetch.rateDist::max_value 8
-system.cpu.fetch.rateDist::total 12512
-system.cpu.fetch.branchRate 0.058000
-system.cpu.fetch.rate 0.317492
-system.cpu.decode.IdleCycles 7217
-system.cpu.decode.BlockedCycles 2933
-system.cpu.decode.RunCycles 1957
-system.cpu.decode.UnblockCycles 130
-system.cpu.decode.SquashCycles 275
-system.cpu.decode.BranchResolved 791
-system.cpu.decode.BranchMispred 149
-system.cpu.decode.DecodedInsts 11520
-system.cpu.decode.SquashedInsts 456
-system.cpu.rename.SquashCycles 275
-system.cpu.rename.IdleCycles 7386
-system.cpu.rename.BlockCycles 930
-system.cpu.rename.serializeStallCycles 461
-system.cpu.rename.RunCycles 1904
-system.cpu.rename.UnblockCycles 1556
-system.cpu.rename.RenamedInsts 11074
-system.cpu.rename.IQFullEvents 22
-system.cpu.rename.LQFullEvents 2
-system.cpu.rename.SQFullEvents 1496
-system.cpu.rename.RenamedOperands 9775
-system.cpu.rename.RenameLookups 17991
-system.cpu.rename.int_rename_lookups 17965
-system.cpu.rename.fp_rename_lookups 26
-system.cpu.rename.CommittedMaps 4998
-system.cpu.rename.UndoneMaps 4777
-system.cpu.rename.serializingInsts 27
-system.cpu.rename.tempSerializingInsts 27
-system.cpu.rename.skidInsts 402
-system.cpu.memDep0.insertedLoads 1923
-system.cpu.memDep0.insertedStores 1570
-system.cpu.memDep0.conflictingLoads 55
-system.cpu.memDep0.conflictingStores 32
-system.cpu.iq.iqInstsAdded 10204
-system.cpu.iq.iqNonSpecInstsAdded 65
-system.cpu.iq.iqInstsIssued 8807
-system.cpu.iq.iqSquashedInstsIssued 41
-system.cpu.iq.iqSquashedInstsExamined 4476
-system.cpu.iq.iqSquashedOperandsExamined 3567
-system.cpu.iq.iqSquashedNonSpecRemoved 49
-system.cpu.iq.issued_per_cycle::samples 12512
-system.cpu.iq.issued_per_cycle::mean 0.703884
-system.cpu.iq.issued_per_cycle::stdev 1.500750
-system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00%
-system.cpu.iq.issued_per_cycle::0 9387 75.02% 75.02%
-system.cpu.iq.issued_per_cycle::1 964 7.70% 82.73%
-system.cpu.iq.issued_per_cycle::2 667 5.33% 88.06%
-system.cpu.iq.issued_per_cycle::3 467 3.73% 91.79%
-system.cpu.iq.issued_per_cycle::4 439 3.51% 95.30%
-system.cpu.iq.issued_per_cycle::5 290 2.32% 97.62%
-system.cpu.iq.issued_per_cycle::6 213 1.70% 99.32%
-system.cpu.iq.issued_per_cycle::7 56 0.45% 99.77%
-system.cpu.iq.issued_per_cycle::8 29 0.23% 100.00%
-system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00%
-system.cpu.iq.issued_per_cycle::min_value 0
-system.cpu.iq.issued_per_cycle::max_value 8
-system.cpu.iq.issued_per_cycle::total 12512
-system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00%
-system.cpu.iq.fu_full::IntAlu 12 6.22% 6.22%
-system.cpu.iq.fu_full::IntMult 0 0.00% 6.22%
-system.cpu.iq.fu_full::IntDiv 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatAdd 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatCmp 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatCvt 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatMult 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatDiv 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatMisc 0 0.00% 6.22%
-system.cpu.iq.fu_full::FloatSqrt 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdAdd 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdAlu 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdCmp 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdCvt 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdMisc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdMult 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdShift 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdSqrt 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 6.22%
-system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 6.22%
-system.cpu.iq.fu_full::MemRead 87 45.08% 51.30%
-system.cpu.iq.fu_full::MemWrite 83 43.01% 94.30%
-system.cpu.iq.fu_full::FloatMemRead 0 0.00% 94.30%
-system.cpu.iq.fu_full::FloatMemWrite 11 5.70% 100.00%
-system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00%
-system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00%
-system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00%
-system.cpu.iq.FU_type_0::IntAlu 5542 62.93% 62.93%
-system.cpu.iq.FU_type_0::IntMult 0 0.00% 62.93%
-system.cpu.iq.FU_type_0::IntDiv 0 0.00% 62.93%
-system.cpu.iq.FU_type_0::FloatAdd 2 0.02% 62.95%
-system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatMult 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdMult 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdShift 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 62.95%
-system.cpu.iq.FU_type_0::MemRead 1815 20.61% 83.56%
-system.cpu.iq.FU_type_0::MemWrite 1422 16.15% 99.70%
-system.cpu.iq.FU_type_0::FloatMemRead 2 0.02% 99.73%
-system.cpu.iq.FU_type_0::FloatMemWrite 24 0.27% 100.00%
-system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00%
-system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00%
-system.cpu.iq.FU_type_0::total 8807
-system.cpu.iq.rate 0.207815
-system.cpu.iq.fu_busy_cnt 193
-system.cpu.iq.fu_busy_rate 0.021914
-system.cpu.iq.int_inst_queue_reads 30293
-system.cpu.iq.int_inst_queue_writes 14715
-system.cpu.iq.int_inst_queue_wakeup_accesses 8133
-system.cpu.iq.fp_inst_queue_reads 67
-system.cpu.iq.fp_inst_queue_writes 36
-system.cpu.iq.fp_inst_queue_wakeup_accesses 27
-system.cpu.iq.int_alu_accesses 8961
-system.cpu.iq.fp_alu_accesses 39
-system.cpu.iew.lsq.thread0.forwLoads 84
-system.cpu.iew.lsq.thread0.invAddrLoads 0
-system.cpu.iew.lsq.thread0.squashedLoads 962
-system.cpu.iew.lsq.thread0.ignoredResponses 3
-system.cpu.iew.lsq.thread0.memOrderViolation 6
-system.cpu.iew.lsq.thread0.squashedStores 524
-system.cpu.iew.lsq.thread0.invAddrSwpfs 0
-system.cpu.iew.lsq.thread0.blockedLoads 0
-system.cpu.iew.lsq.thread0.rescheduledLoads 1
-system.cpu.iew.lsq.thread0.cacheBlocked 21
-system.cpu.iew.iewIdleCycles 0
-system.cpu.iew.iewSquashCycles 275
-system.cpu.iew.iewBlockCycles 818
-system.cpu.iew.iewUnblockCycles 73
-system.cpu.iew.iewDispatchedInsts 10269
-system.cpu.iew.iewDispSquashedInsts 43
-system.cpu.iew.iewDispLoadInsts 1923
-system.cpu.iew.iewDispStoreInsts 1570
-system.cpu.iew.iewDispNonSpecInsts 53
-system.cpu.iew.iewIQFullEvents 12
-system.cpu.iew.iewLSQFullEvents 60
-system.cpu.iew.memOrderViolationEvents 6
-system.cpu.iew.predictedTakenIncorrect 71
-system.cpu.iew.predictedNotTakenIncorrect 256
-system.cpu.iew.branchMispredicts 327
-system.cpu.iew.iewExecutedInsts 8488
-system.cpu.iew.iewExecLoadInsts 1719
-system.cpu.iew.iewExecSquashedInsts 319
-system.cpu.iew.exec_swp 0
-system.cpu.iew.exec_nop 0
-system.cpu.iew.exec_refs 3083
-system.cpu.iew.exec_branches 1364
-system.cpu.iew.exec_stores 1364
-system.cpu.iew.exec_rate 0.200288
-system.cpu.iew.wb_sent 8262
-system.cpu.iew.wb_count 8160
-system.cpu.iew.wb_producers 4466
-system.cpu.iew.wb_consumers 7207
-system.cpu.iew.wb_rate 0.192548
-system.cpu.iew.wb_fanout 0.619675
-system.cpu.commit.commitSquashedInsts 4479
-system.cpu.commit.commitNonSpecStalls 16
-system.cpu.commit.branchMispredicts 270
-system.cpu.commit.committed_per_cycle::samples 11809
-system.cpu.commit.committed_per_cycle::mean 0.490473
-system.cpu.commit.committed_per_cycle::stdev 1.351476
-system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00%
-system.cpu.commit.committed_per_cycle::0 9644 81.67% 81.67%
-system.cpu.commit.committed_per_cycle::1 845 7.16% 88.82%
-system.cpu.commit.committed_per_cycle::2 531 4.50% 93.32%
-system.cpu.commit.committed_per_cycle::3 215 1.82% 95.14%
-system.cpu.commit.committed_per_cycle::4 177 1.50% 96.64%
-system.cpu.commit.committed_per_cycle::5 110 0.93% 97.57%
-system.cpu.commit.committed_per_cycle::6 132 1.12% 98.69%
-system.cpu.commit.committed_per_cycle::7 50 0.42% 99.11%
-system.cpu.commit.committed_per_cycle::8 105 0.89% 100.00%
-system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00%
-system.cpu.commit.committed_per_cycle::min_value 0
-system.cpu.commit.committed_per_cycle::max_value 8
-system.cpu.commit.committed_per_cycle::total 11809
-system.cpu.commit.committedInsts 5792
-system.cpu.commit.committedOps 5792
-system.cpu.commit.swp_count 0
-system.cpu.commit.refs 2007
-system.cpu.commit.loads 961
-system.cpu.commit.membars 7
-system.cpu.commit.branches 1037
-system.cpu.commit.fp_insts 22
-system.cpu.commit.int_insts 5698
-system.cpu.commit.function_calls 103
-system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00%
-system.cpu.commit.op_class_0::IntAlu 3783 65.31% 65.31%
-system.cpu.commit.op_class_0::IntMult 0 0.00% 65.31%
-system.cpu.commit.op_class_0::IntDiv 0 0.00% 65.31%
-system.cpu.commit.op_class_0::FloatAdd 2 0.03% 65.35%
-system.cpu.commit.op_class_0::FloatCmp 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatCvt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatMult 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatDiv 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatMisc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdAdd 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdAlu 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdCmp 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdCvt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdMisc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdMult 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdMultAcc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdShift 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdShiftAcc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdSqrt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatAdd 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 65.35%
-system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 65.35%
-system.cpu.commit.op_class_0::MemRead 960 16.57% 81.92%
-system.cpu.commit.op_class_0::MemWrite 1027 17.73% 99.65%
-system.cpu.commit.op_class_0::FloatMemRead 1 0.02% 99.67%
-system.cpu.commit.op_class_0::FloatMemWrite 19 0.33% 100.00%
-system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00%
-system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00%
-system.cpu.commit.op_class_0::total 5792
-system.cpu.commit.bw_lim_events 105
-system.cpu.rob.rob_reads 21975
-system.cpu.rob.rob_writes 21246
-system.cpu.timesIdled 227
-system.cpu.idleCycles 29867
-system.cpu.committedInsts 5792
-system.cpu.committedOps 5792
-system.cpu.cpi 7.316816
-system.cpu.cpi_total 7.316816
-system.cpu.ipc 0.136671
-system.cpu.ipc_total 0.136671
-system.cpu.int_regfile_reads 13468
-system.cpu.int_regfile_writes 7187
-system.cpu.fp_regfile_reads 25
-system.cpu.fp_regfile_writes 2
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.dcache.tags.replacements 0
-system.cpu.dcache.tags.tagsinuse 66.953799
-system.cpu.dcache.tags.total_refs 2204
-system.cpu.dcache.tags.sampled_refs 104
-system.cpu.dcache.tags.avg_refs 21.192308
-system.cpu.dcache.tags.warmup_cycle 0
-system.cpu.dcache.tags.occ_blocks::cpu.data 66.953799
-system.cpu.dcache.tags.occ_percent::cpu.data 0.016346
-system.cpu.dcache.tags.occ_percent::total 0.016346
-system.cpu.dcache.tags.occ_task_id_blocks::1024 104
-system.cpu.dcache.tags.age_task_id_blocks_1024::0 24
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 80
-system.cpu.dcache.tags.occ_task_id_percent::1024 0.025391
-system.cpu.dcache.tags.tag_accesses 5386
-system.cpu.dcache.tags.data_accesses 5386
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.dcache.ReadReq_hits::cpu.data 1483
-system.cpu.dcache.ReadReq_hits::total 1483
-system.cpu.dcache.WriteReq_hits::cpu.data 721
-system.cpu.dcache.WriteReq_hits::total 721
-system.cpu.dcache.demand_hits::cpu.data 2204
-system.cpu.dcache.demand_hits::total 2204
-system.cpu.dcache.overall_hits::cpu.data 2204
-system.cpu.dcache.overall_hits::total 2204
-system.cpu.dcache.ReadReq_misses::cpu.data 112
-system.cpu.dcache.ReadReq_misses::total 112
-system.cpu.dcache.WriteReq_misses::cpu.data 325
-system.cpu.dcache.WriteReq_misses::total 325
-system.cpu.dcache.demand_misses::cpu.data 437
-system.cpu.dcache.demand_misses::total 437
-system.cpu.dcache.overall_misses::cpu.data 437
-system.cpu.dcache.overall_misses::total 437
-system.cpu.dcache.ReadReq_miss_latency::cpu.data 8129500
-system.cpu.dcache.ReadReq_miss_latency::total 8129500
-system.cpu.dcache.WriteReq_miss_latency::cpu.data 32497996
-system.cpu.dcache.WriteReq_miss_latency::total 32497996
-system.cpu.dcache.demand_miss_latency::cpu.data 40627496
-system.cpu.dcache.demand_miss_latency::total 40627496
-system.cpu.dcache.overall_miss_latency::cpu.data 40627496
-system.cpu.dcache.overall_miss_latency::total 40627496
-system.cpu.dcache.ReadReq_accesses::cpu.data 1595
-system.cpu.dcache.ReadReq_accesses::total 1595
-system.cpu.dcache.WriteReq_accesses::cpu.data 1046
-system.cpu.dcache.WriteReq_accesses::total 1046
-system.cpu.dcache.demand_accesses::cpu.data 2641
-system.cpu.dcache.demand_accesses::total 2641
-system.cpu.dcache.overall_accesses::cpu.data 2641
-system.cpu.dcache.overall_accesses::total 2641
-system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070219
-system.cpu.dcache.ReadReq_miss_rate::total 0.070219
-system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.310707
-system.cpu.dcache.WriteReq_miss_rate::total 0.310707
-system.cpu.dcache.demand_miss_rate::cpu.data 0.165468
-system.cpu.dcache.demand_miss_rate::total 0.165468
-system.cpu.dcache.overall_miss_rate::cpu.data 0.165468
-system.cpu.dcache.overall_miss_rate::total 0.165468
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 72584.821429
-system.cpu.dcache.ReadReq_avg_miss_latency::total 72584.821429
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 99993.833846
-system.cpu.dcache.WriteReq_avg_miss_latency::total 99993.833846
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 92969.098398
-system.cpu.dcache.demand_avg_miss_latency::total 92969.098398
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 92969.098398
-system.cpu.dcache.overall_avg_miss_latency::total 92969.098398
-system.cpu.dcache.blocked_cycles::no_mshrs 749
-system.cpu.dcache.blocked_cycles::no_targets 0
-system.cpu.dcache.blocked::no_mshrs 9
-system.cpu.dcache.blocked::no_targets 0
-system.cpu.dcache.avg_blocked_cycles::no_mshrs 83.222222
-system.cpu.dcache.avg_blocked_cycles::no_targets nan
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data 54
-system.cpu.dcache.ReadReq_mshr_hits::total 54
-system.cpu.dcache.WriteReq_mshr_hits::cpu.data 278
-system.cpu.dcache.WriteReq_mshr_hits::total 278
-system.cpu.dcache.demand_mshr_hits::cpu.data 332
-system.cpu.dcache.demand_mshr_hits::total 332
-system.cpu.dcache.overall_mshr_hits::cpu.data 332
-system.cpu.dcache.overall_mshr_hits::total 332
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data 58
-system.cpu.dcache.ReadReq_mshr_misses::total 58
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data 47
-system.cpu.dcache.WriteReq_mshr_misses::total 47
-system.cpu.dcache.demand_mshr_misses::cpu.data 105
-system.cpu.dcache.demand_mshr_misses::total 105
-system.cpu.dcache.overall_mshr_misses::cpu.data 105
-system.cpu.dcache.overall_mshr_misses::total 105
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 4818000
-system.cpu.dcache.ReadReq_mshr_miss_latency::total 4818000
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 4694498
-system.cpu.dcache.WriteReq_mshr_miss_latency::total 4694498
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data 9512498
-system.cpu.dcache.demand_mshr_miss_latency::total 9512498
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data 9512498
-system.cpu.dcache.overall_mshr_miss_latency::total 9512498
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.036364
-system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.036364
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.044933
-system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.044933
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.039758
-system.cpu.dcache.demand_mshr_miss_rate::total 0.039758
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.039758
-system.cpu.dcache.overall_mshr_miss_rate::total 0.039758
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 83068.965517
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 83068.965517
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 99882.936170
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 99882.936170
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 90595.219048
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 90595.219048
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 90595.219048
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 90595.219048
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.icache.tags.replacements 0
-system.cpu.icache.tags.tagsinuse 168.700112
-system.cpu.icache.tags.total_refs 1435
-system.cpu.icache.tags.sampled_refs 349
-system.cpu.icache.tags.avg_refs 4.111748
-system.cpu.icache.tags.warmup_cycle 0
-system.cpu.icache.tags.occ_blocks::cpu.inst 168.700112
-system.cpu.icache.tags.occ_percent::cpu.inst 0.082373
-system.cpu.icache.tags.occ_percent::total 0.082373
-system.cpu.icache.tags.occ_task_id_blocks::1024 349
-system.cpu.icache.tags.age_task_id_blocks_1024::0 174
-system.cpu.icache.tags.age_task_id_blocks_1024::1 175
-system.cpu.icache.tags.occ_task_id_percent::1024 0.170410
-system.cpu.icache.tags.tag_accesses 4079
-system.cpu.icache.tags.data_accesses 4079
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.icache.ReadReq_hits::cpu.inst 1435
-system.cpu.icache.ReadReq_hits::total 1435
-system.cpu.icache.demand_hits::cpu.inst 1435
-system.cpu.icache.demand_hits::total 1435
-system.cpu.icache.overall_hits::cpu.inst 1435
-system.cpu.icache.overall_hits::total 1435
-system.cpu.icache.ReadReq_misses::cpu.inst 430
-system.cpu.icache.ReadReq_misses::total 430
-system.cpu.icache.demand_misses::cpu.inst 430
-system.cpu.icache.demand_misses::total 430
-system.cpu.icache.overall_misses::cpu.inst 430
-system.cpu.icache.overall_misses::total 430
-system.cpu.icache.ReadReq_miss_latency::cpu.inst 33426000
-system.cpu.icache.ReadReq_miss_latency::total 33426000
-system.cpu.icache.demand_miss_latency::cpu.inst 33426000
-system.cpu.icache.demand_miss_latency::total 33426000
-system.cpu.icache.overall_miss_latency::cpu.inst 33426000
-system.cpu.icache.overall_miss_latency::total 33426000
-system.cpu.icache.ReadReq_accesses::cpu.inst 1865
-system.cpu.icache.ReadReq_accesses::total 1865
-system.cpu.icache.demand_accesses::cpu.inst 1865
-system.cpu.icache.demand_accesses::total 1865
-system.cpu.icache.overall_accesses::cpu.inst 1865
-system.cpu.icache.overall_accesses::total 1865
-system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.230563
-system.cpu.icache.ReadReq_miss_rate::total 0.230563
-system.cpu.icache.demand_miss_rate::cpu.inst 0.230563
-system.cpu.icache.demand_miss_rate::total 0.230563
-system.cpu.icache.overall_miss_rate::cpu.inst 0.230563
-system.cpu.icache.overall_miss_rate::total 0.230563
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 77734.883721
-system.cpu.icache.ReadReq_avg_miss_latency::total 77734.883721
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 77734.883721
-system.cpu.icache.demand_avg_miss_latency::total 77734.883721
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 77734.883721
-system.cpu.icache.overall_avg_miss_latency::total 77734.883721
-system.cpu.icache.blocked_cycles::no_mshrs 569
-system.cpu.icache.blocked_cycles::no_targets 0
-system.cpu.icache.blocked::no_mshrs 5
-system.cpu.icache.blocked::no_targets 0
-system.cpu.icache.avg_blocked_cycles::no_mshrs 113.800000
-system.cpu.icache.avg_blocked_cycles::no_targets nan
-system.cpu.icache.ReadReq_mshr_hits::cpu.inst 80
-system.cpu.icache.ReadReq_mshr_hits::total 80
-system.cpu.icache.demand_mshr_hits::cpu.inst 80
-system.cpu.icache.demand_mshr_hits::total 80
-system.cpu.icache.overall_mshr_hits::cpu.inst 80
-system.cpu.icache.overall_mshr_hits::total 80
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst 350
-system.cpu.icache.ReadReq_mshr_misses::total 350
-system.cpu.icache.demand_mshr_misses::cpu.inst 350
-system.cpu.icache.demand_mshr_misses::total 350
-system.cpu.icache.overall_mshr_misses::cpu.inst 350
-system.cpu.icache.overall_mshr_misses::total 350
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 28154000
-system.cpu.icache.ReadReq_mshr_miss_latency::total 28154000
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst 28154000
-system.cpu.icache.demand_mshr_miss_latency::total 28154000
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst 28154000
-system.cpu.icache.overall_mshr_miss_latency::total 28154000
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.187668
-system.cpu.icache.ReadReq_mshr_miss_rate::total 0.187668
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.187668
-system.cpu.icache.demand_mshr_miss_rate::total 0.187668
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.187668
-system.cpu.icache.overall_mshr_miss_rate::total 0.187668
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 80440
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 80440
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 80440
-system.cpu.icache.demand_avg_mshr_miss_latency::total 80440
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 80440
-system.cpu.icache.overall_avg_mshr_miss_latency::total 80440
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.l2cache.tags.replacements 0
-system.cpu.l2cache.tags.tagsinuse 232.210591
-system.cpu.l2cache.tags.total_refs 10
-system.cpu.l2cache.tags.sampled_refs 443
-system.cpu.l2cache.tags.avg_refs 0.022573
-system.cpu.l2cache.tags.warmup_cycle 0
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 166.990617
-system.cpu.l2cache.tags.occ_blocks::cpu.data 65.219974
-system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005096
-system.cpu.l2cache.tags.occ_percent::cpu.data 0.001990
-system.cpu.l2cache.tags.occ_percent::total 0.007087
-system.cpu.l2cache.tags.occ_task_id_blocks::1024 443
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0 189
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1 254
-system.cpu.l2cache.tags.occ_task_id_percent::1024 0.013519
-system.cpu.l2cache.tags.tag_accesses 4083
-system.cpu.l2cache.tags.data_accesses 4083
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 8
-system.cpu.l2cache.ReadCleanReq_hits::total 8
-system.cpu.l2cache.ReadSharedReq_hits::cpu.data 2
-system.cpu.l2cache.ReadSharedReq_hits::total 2
-system.cpu.l2cache.demand_hits::cpu.inst 8
-system.cpu.l2cache.demand_hits::cpu.data 2
-system.cpu.l2cache.demand_hits::total 10
-system.cpu.l2cache.overall_hits::cpu.inst 8
-system.cpu.l2cache.overall_hits::cpu.data 2
-system.cpu.l2cache.overall_hits::total 10
-system.cpu.l2cache.ReadExReq_misses::cpu.data 47
-system.cpu.l2cache.ReadExReq_misses::total 47
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 342
-system.cpu.l2cache.ReadCleanReq_misses::total 342
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data 56
-system.cpu.l2cache.ReadSharedReq_misses::total 56
-system.cpu.l2cache.demand_misses::cpu.inst 342
-system.cpu.l2cache.demand_misses::cpu.data 103
-system.cpu.l2cache.demand_misses::total 445
-system.cpu.l2cache.overall_misses::cpu.inst 342
-system.cpu.l2cache.overall_misses::cpu.data 103
-system.cpu.l2cache.overall_misses::total 445
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 4620500
-system.cpu.l2cache.ReadExReq_miss_latency::total 4620500
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 27538000
-system.cpu.l2cache.ReadCleanReq_miss_latency::total 27538000
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 4709000
-system.cpu.l2cache.ReadSharedReq_miss_latency::total 4709000
-system.cpu.l2cache.demand_miss_latency::cpu.inst 27538000
-system.cpu.l2cache.demand_miss_latency::cpu.data 9329500
-system.cpu.l2cache.demand_miss_latency::total 36867500
-system.cpu.l2cache.overall_miss_latency::cpu.inst 27538000
-system.cpu.l2cache.overall_miss_latency::cpu.data 9329500
-system.cpu.l2cache.overall_miss_latency::total 36867500
-system.cpu.l2cache.ReadExReq_accesses::cpu.data 47
-system.cpu.l2cache.ReadExReq_accesses::total 47
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 350
-system.cpu.l2cache.ReadCleanReq_accesses::total 350
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 58
-system.cpu.l2cache.ReadSharedReq_accesses::total 58
-system.cpu.l2cache.demand_accesses::cpu.inst 350
-system.cpu.l2cache.demand_accesses::cpu.data 105
-system.cpu.l2cache.demand_accesses::total 455
-system.cpu.l2cache.overall_accesses::cpu.inst 350
-system.cpu.l2cache.overall_accesses::cpu.data 105
-system.cpu.l2cache.overall_accesses::total 455
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadExReq_miss_rate::total 1
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.977143
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.965517
-system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.965517
-system.cpu.l2cache.demand_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.demand_miss_rate::cpu.data 0.980952
-system.cpu.l2cache.demand_miss_rate::total 0.978022
-system.cpu.l2cache.overall_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.overall_miss_rate::cpu.data 0.980952
-system.cpu.l2cache.overall_miss_rate::total 0.978022
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 98308.510638
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 98308.510638
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 80520.467836
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 80520.467836
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 84089.285714
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 84089.285714
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 80520.467836
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 90577.669903
-system.cpu.l2cache.demand_avg_miss_latency::total 82848.314607
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 80520.467836
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 90577.669903
-system.cpu.l2cache.overall_avg_miss_latency::total 82848.314607
-system.cpu.l2cache.blocked_cycles::no_mshrs 0
-system.cpu.l2cache.blocked_cycles::no_targets 0
-system.cpu.l2cache.blocked::no_mshrs 0
-system.cpu.l2cache.blocked::no_targets 0
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan
-system.cpu.l2cache.avg_blocked_cycles::no_targets nan
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 47
-system.cpu.l2cache.ReadExReq_mshr_misses::total 47
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 342
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total 342
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 56
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total 56
-system.cpu.l2cache.demand_mshr_misses::cpu.inst 342
-system.cpu.l2cache.demand_mshr_misses::cpu.data 103
-system.cpu.l2cache.demand_mshr_misses::total 445
-system.cpu.l2cache.overall_mshr_misses::cpu.inst 342
-system.cpu.l2cache.overall_mshr_misses::cpu.data 103
-system.cpu.l2cache.overall_mshr_misses::total 445
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 4150500
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 4150500
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 24128000
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 24128000
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 4159000
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 4159000
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 24128000
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 8309500
-system.cpu.l2cache.demand_mshr_miss_latency::total 32437500
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 24128000
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 8309500
-system.cpu.l2cache.overall_mshr_miss_latency::total 32437500
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.977143
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.965517
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.965517
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.980952
-system.cpu.l2cache.demand_mshr_miss_rate::total 0.978022
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.977143
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.980952
-system.cpu.l2cache.overall_mshr_miss_rate::total 0.978022
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 88308.510638
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 88308.510638
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 70549.707602
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 70549.707602
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 74267.857143
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 74267.857143
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 70549.707602
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 80674.757282
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 72893.258427
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 70549.707602
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 80674.757282
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 72893.258427
-system.cpu.toL2Bus.snoop_filter.tot_requests 455
-system.cpu.toL2Bus.snoop_filter.hit_single_requests 10
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0
-system.cpu.toL2Bus.snoop_filter.tot_snoops 0
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 21189000
-system.cpu.toL2Bus.trans_dist::ReadResp 406
-system.cpu.toL2Bus.trans_dist::ReadExReq 47
-system.cpu.toL2Bus.trans_dist::ReadExResp 47
-system.cpu.toL2Bus.trans_dist::ReadCleanReq 350
-system.cpu.toL2Bus.trans_dist::ReadSharedReq 58
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 699
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 209
-system.cpu.toL2Bus.pkt_count::total 908
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 22336
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6656
-system.cpu.toL2Bus.pkt_size::total 28992
-system.cpu.toL2Bus.snoops 0
-system.cpu.toL2Bus.snoopTraffic 0
-system.cpu.toL2Bus.snoop_fanout::samples 455
-system.cpu.toL2Bus.snoop_fanout::mean 0.021978
-system.cpu.toL2Bus.snoop_fanout::stdev 0.146773
-system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
-system.cpu.toL2Bus.snoop_fanout::0 445 97.80% 97.80%
-system.cpu.toL2Bus.snoop_fanout::1 10 2.20% 100.00%
-system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value 0
-system.cpu.toL2Bus.snoop_fanout::max_value 1
-system.cpu.toL2Bus.snoop_fanout::total 455
-system.cpu.toL2Bus.reqLayer0.occupancy 227500
-system.cpu.toL2Bus.reqLayer0.utilization 1.1
-system.cpu.toL2Bus.respLayer0.occupancy 523500
-system.cpu.toL2Bus.respLayer0.utilization 2.5
-system.cpu.toL2Bus.respLayer1.occupancy 156000
-system.cpu.toL2Bus.respLayer1.utilization 0.7
-system.membus.snoop_filter.tot_requests 444
-system.membus.snoop_filter.hit_single_requests 0
-system.membus.snoop_filter.hit_multi_requests 0
-system.membus.snoop_filter.tot_snoops 0
-system.membus.snoop_filter.hit_single_snoops 0
-system.membus.snoop_filter.hit_multi_snoops 0
-system.membus.pwrStateResidencyTicks::UNDEFINED 21189000
-system.membus.trans_dist::ReadResp 396
-system.membus.trans_dist::ReadExReq 47
-system.membus.trans_dist::ReadExResp 47
-system.membus.trans_dist::ReadSharedReq 397
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 887
-system.membus.pkt_count::total 887
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28352
-system.membus.pkt_size::total 28352
-system.membus.snoops 0
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 444
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 444 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 444
-system.membus.reqLayer0.occupancy 553000
-system.membus.reqLayer0.utilization 2.6
-system.membus.respLayer1.occupancy 2325750
-system.membus.respLayer1.utilization 11.0
-
----------- End Simulation Statistics ----------
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
deleted file mode 100644
index a94f4dc46..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
+++ /dev/null
@@ -1,214 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-UnifiedTLB=true
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=PowerInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=PowerISA
-eventq_index=0
-
-[system.cpu.itb]
-type=PowerTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/power/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr
deleted file mode 100755
index c0b55d123..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr
+++ /dev/null
@@ -1,3 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
deleted file mode 100755
index e1a395fe5..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simout
-Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr 3 2017 19:22:30
-gem5 started Apr 3 2017 19:22:48
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 103795
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/power/linux/simple-atomic
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 2896000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
deleted file mode 100644
index ecd255c85..000000000
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
+++ /dev/null
@@ -1,153 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000003
-sim_ticks 2896000
-final_tick 2896000
-sim_freq 1000000000000
-host_inst_rate 591136
-host_op_rate 589882
-host_tick_rate 294306849
-host_mem_usage 250080
-host_seconds 0.01
-sim_insts 5793
-sim_ops 5793
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 2896000
-system.physmem.bytes_read::cpu.inst 23172
-system.physmem.bytes_read::cpu.data 3720
-system.physmem.bytes_read::total 26892
-system.physmem.bytes_inst_read::cpu.inst 23172
-system.physmem.bytes_inst_read::total 23172
-system.physmem.bytes_written::cpu.data 4209
-system.physmem.bytes_written::total 4209
-system.physmem.num_reads::cpu.inst 5793
-system.physmem.num_reads::cpu.data 961
-system.physmem.num_reads::total 6754
-system.physmem.num_writes::cpu.data 1046
-system.physmem.num_writes::total 1046
-system.physmem.bw_read::cpu.inst 8001381215
-system.physmem.bw_read::cpu.data 1284530387
-system.physmem.bw_read::total 9285911602
-system.physmem.bw_inst_read::cpu.inst 8001381215
-system.physmem.bw_inst_read::total 8001381215
-system.physmem.bw_write::cpu.data 1453383978
-system.physmem.bw_write::total 1453383978
-system.physmem.bw_total::cpu.inst 8001381215
-system.physmem.bw_total::cpu.data 2737914365
-system.physmem.bw_total::total 10739295580
-system.pwrStateResidencyTicks::UNDEFINED 2896000
-system.cpu_clk_domain.clock 500
-system.cpu.dtb.read_hits 0
-system.cpu.dtb.read_misses 0
-system.cpu.dtb.read_accesses 0
-system.cpu.dtb.write_hits 0
-system.cpu.dtb.write_misses 0
-system.cpu.dtb.write_accesses 0
-system.cpu.dtb.hits 0
-system.cpu.dtb.misses 0
-system.cpu.dtb.accesses 0
-system.cpu.itb.read_hits 0
-system.cpu.itb.read_misses 0
-system.cpu.itb.read_accesses 0
-system.cpu.itb.write_hits 0
-system.cpu.itb.write_misses 0
-system.cpu.itb.write_accesses 0
-system.cpu.itb.hits 0
-system.cpu.itb.misses 0
-system.cpu.itb.accesses 0
-system.cpu.workload.numSyscalls 9
-system.cpu.pwrStateResidencyTicks::ON 2896000
-system.cpu.numCycles 5793
-system.cpu.numWorkItemsStarted 0
-system.cpu.numWorkItemsCompleted 0
-system.cpu.committedInsts 5793
-system.cpu.committedOps 5793
-system.cpu.num_int_alu_accesses 5698
-system.cpu.num_fp_alu_accesses 22
-system.cpu.num_func_calls 200
-system.cpu.num_conditional_control_insts 895
-system.cpu.num_int_insts 5698
-system.cpu.num_fp_insts 22
-system.cpu.num_int_register_reads 9529
-system.cpu.num_int_register_writes 4996
-system.cpu.num_fp_register_reads 20
-system.cpu.num_fp_register_writes 2
-system.cpu.num_mem_refs 2007
-system.cpu.num_load_insts 961
-system.cpu.num_store_insts 1046
-system.cpu.num_idle_cycles 0
-system.cpu.num_busy_cycles 5793
-system.cpu.not_idle_fraction 1
-system.cpu.idle_fraction 0
-system.cpu.Branches 1037
-system.cpu.op_class::No_OpClass 0 0.00% 0.00%
-system.cpu.op_class::IntAlu 3784 65.32% 65.32%
-system.cpu.op_class::IntMult 0 0.00% 65.32%
-system.cpu.op_class::IntDiv 0 0.00% 65.32%
-system.cpu.op_class::FloatAdd 2 0.03% 65.35%
-system.cpu.op_class::FloatCmp 0 0.00% 65.35%
-system.cpu.op_class::FloatCvt 0 0.00% 65.35%
-system.cpu.op_class::FloatMult 0 0.00% 65.35%
-system.cpu.op_class::FloatMultAcc 0 0.00% 65.35%
-system.cpu.op_class::FloatDiv 0 0.00% 65.35%
-system.cpu.op_class::FloatMisc 0 0.00% 65.35%
-system.cpu.op_class::FloatSqrt 0 0.00% 65.35%
-system.cpu.op_class::SimdAdd 0 0.00% 65.35%
-system.cpu.op_class::SimdAddAcc 0 0.00% 65.35%
-system.cpu.op_class::SimdAlu 0 0.00% 65.35%
-system.cpu.op_class::SimdCmp 0 0.00% 65.35%
-system.cpu.op_class::SimdCvt 0 0.00% 65.35%
-system.cpu.op_class::SimdMisc 0 0.00% 65.35%
-system.cpu.op_class::SimdMult 0 0.00% 65.35%
-system.cpu.op_class::SimdMultAcc 0 0.00% 65.35%
-system.cpu.op_class::SimdShift 0 0.00% 65.35%
-system.cpu.op_class::SimdShiftAcc 0 0.00% 65.35%
-system.cpu.op_class::SimdSqrt 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatAdd 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatAlu 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatCmp 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatCvt 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatDiv 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatMisc 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatMult 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 65.35%
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 65.35%
-system.cpu.op_class::MemRead 960 16.57% 81.93%
-system.cpu.op_class::MemWrite 1027 17.73% 99.65%
-system.cpu.op_class::FloatMemRead 1 0.02% 99.67%
-system.cpu.op_class::FloatMemWrite 19 0.33% 100.00%
-system.cpu.op_class::IprAccess 0 0.00% 100.00%
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
-system.cpu.op_class::total 5793
-system.membus.snoop_filter.tot_requests 0
-system.membus.snoop_filter.hit_single_requests 0
-system.membus.snoop_filter.hit_multi_requests 0
-system.membus.snoop_filter.tot_snoops 0
-system.membus.snoop_filter.hit_single_snoops 0
-system.membus.snoop_filter.hit_multi_snoops 0
-system.membus.pwrStateResidencyTicks::UNDEFINED 2896000
-system.membus.trans_dist::ReadReq 6754
-system.membus.trans_dist::ReadResp 6754
-system.membus.trans_dist::WriteReq 1046
-system.membus.trans_dist::WriteResp 1046
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 11586
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 4014
-system.membus.pkt_count::total 15600
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 23172
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 7929
-system.membus.pkt_size::total 31101
-system.membus.snoops 0
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 7800
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 7800 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 7800
-
----------- End Simulation Statistics ----------