summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/riscv/linux/minor-timing
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/00.hello/ref/riscv/linux/minor-timing')
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini905
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json1214
-rwxr-xr-xtests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr6
-rwxr-xr-xtests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout13
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt769
5 files changed, 0 insertions, 2907 deletions
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini
deleted file mode 100644
index 6a3662c7a..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.ini
+++ /dev/null
@@ -1,905 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=MinorCPU
-children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=system.cpu.branchPred
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-decodeCycleInput=true
-decodeInputBufferSize=3
-decodeInputWidth=2
-decodeToExecuteForwardDelay=1
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-enableIdling=true
-eventq_index=0
-executeAllowEarlyMemoryIssue=true
-executeBranchDelay=1
-executeCommitLimit=2
-executeCycleInput=true
-executeFuncUnits=system.cpu.executeFuncUnits
-executeInputBufferSize=7
-executeInputWidth=2
-executeIssueLimit=2
-executeLSQMaxStoreBufferStoresPerCycle=2
-executeLSQRequestsQueueSize=1
-executeLSQStoreBufferSize=5
-executeLSQTransfersQueueSize=2
-executeMaxAccessesInMemory=2
-executeMemoryCommitLimit=1
-executeMemoryIssueLimit=1
-executeMemoryWidth=0
-executeSetTraceTimeOnCommit=true
-executeSetTraceTimeOnIssue=false
-fetch1FetchLimit=1
-fetch1LineSnapWidth=0
-fetch1LineWidth=0
-fetch1ToFetch2BackwardDelay=1
-fetch1ToFetch2ForwardDelay=1
-fetch2CycleInput=true
-fetch2InputBufferSize=2
-fetch2ToDecodeForwardDelay=1
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-threadPolicy=RoundRobin
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.branchPred]
-type=TournamentBP
-BTBEntries=4096
-BTBTagSize=16
-RASSize=16
-choiceCtrBits=2
-choicePredictorSize=8192
-eventq_index=0
-globalCtrBits=2
-globalPredictorSize=8192
-indirectHashGHR=true
-indirectHashTargets=true
-indirectPathLength=3
-indirectSets=256
-indirectTagSize=16
-indirectWays=2
-instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
-numThreads=1
-useIndirect=true
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.executeFuncUnits]
-type=MinorFUPool
-children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
-eventq_index=0
-funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
-
-[system.cpu.executeFuncUnits.funcUnits0]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits0.timings
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits0.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits1]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits1.timings
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntAlu
-
-[system.cpu.executeFuncUnits.funcUnits1.timings]
-type=MinorFUTiming
-children=opClasses
-description=Int
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits2]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
-opLat=3
-timings=system.cpu.executeFuncUnits.funcUnits2.timings
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntMult
-
-[system.cpu.executeFuncUnits.funcUnits2.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mul
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
-srcRegsRelativeLats=0
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits3]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=9
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
-opLat=9
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses]
-type=MinorOpClassSet
-children=opClasses
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
-
-[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
-type=MinorOpClass
-eventq_index=0
-opClass=IntDiv
-
-[system.cpu.executeFuncUnits.funcUnits4]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
-opLat=6
-timings=system.cpu.executeFuncUnits.funcUnits4.timings
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses]
-type=MinorOpClassSet
-children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAddAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShift
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdShiftAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAdd
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatAlu
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCmp
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatCvt
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatDiv
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMisc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMult
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatMultAcc
-
-[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27]
-type=MinorOpClass
-eventq_index=0
-opClass=SimdFloatSqrt
-
-[system.cpu.executeFuncUnits.funcUnits4.timings]
-type=MinorFUTiming
-children=opClasses
-description=FloatSimd
-eventq_index=0
-extraAssumedLat=0
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
-srcRegsRelativeLats=2
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits5]
-type=MinorFU
-children=opClasses timings
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
-opLat=1
-timings=system.cpu.executeFuncUnits.funcUnits5.timings
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1 opClasses2 opClasses3
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=MemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=MemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemRead
-
-[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3]
-type=MinorOpClass
-eventq_index=0
-opClass=FloatMemWrite
-
-[system.cpu.executeFuncUnits.funcUnits5.timings]
-type=MinorFUTiming
-children=opClasses
-description=Mem
-eventq_index=0
-extraAssumedLat=2
-extraCommitLat=0
-extraCommitLatExpr=Null
-mask=0
-match=0
-opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
-srcRegsRelativeLats=1
-suppress=false
-
-[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
-type=MinorOpClassSet
-eventq_index=0
-opClasses=
-
-[system.cpu.executeFuncUnits.funcUnits6]
-type=MinorFU
-children=opClasses
-cantForwardFromFUIndices=
-eventq_index=0
-issueLat=1
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
-opLat=1
-timings=
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses]
-type=MinorOpClassSet
-children=opClasses0 opClasses1
-eventq_index=0
-opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
-type=MinorOpClass
-eventq_index=0
-opClass=IprAccess
-
-[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
-type=MinorOpClass
-eventq_index=0
-opClass=InstPrefetch
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=DRAMCtrl
-IDD0=0.055000
-IDD02=0.000000
-IDD2N=0.032000
-IDD2N2=0.000000
-IDD2P0=0.000000
-IDD2P02=0.000000
-IDD2P1=0.032000
-IDD2P12=0.000000
-IDD3N=0.038000
-IDD3N2=0.000000
-IDD3P0=0.000000
-IDD3P02=0.000000
-IDD3P1=0.038000
-IDD3P12=0.000000
-IDD4R=0.157000
-IDD4R2=0.000000
-IDD4W=0.125000
-IDD4W2=0.000000
-IDD5=0.235000
-IDD52=0.000000
-IDD6=0.020000
-IDD62=0.000000
-VDD=1.500000
-VDD2=0.000000
-activation_limit=4
-addr_mapping=RoRaBaCoCh
-bank_groups_per_rank=0
-banks_per_rank=8
-burst_length=8
-channels=1
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-device_bus_width=8
-device_rowbuffer_size=1024
-device_size=536870912
-devices_per_rank=8
-dll=true
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-max_accesses_per_row=16
-mem_sched_policy=frfcfs
-min_writes_per_switch=16
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-page_policy=open_adaptive
-power_model=Null
-range=0:134217727:0:0:0:0
-ranks_per_channel=2
-read_buffer_size=32
-static_backend_latency=10000
-static_frontend_latency=10000
-tBURST=5000
-tCCD_L=0
-tCK=1250
-tCL=13750
-tCS=2500
-tRAS=35000
-tRCD=13750
-tREFI=7800000
-tRFC=260000
-tRP=13750
-tRRD=6000
-tRRD_L=0
-tRTP=7500
-tRTW=2500
-tWR=15000
-tWTR=7500
-tXAW=30000
-tXP=6000
-tXPDLL=0
-tXS=270000
-tXSDLL=0
-write_buffer_size=64
-write_high_thresh_perc=85
-write_low_thresh_perc=50
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json
deleted file mode 100644
index 3c0047009..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/config.json
+++ /dev/null
@@ -1,1214 +0,0 @@
-{
- "name": null,
- "sim_quantum": 0,
- "system": {
- "kernel": "",
- "mmap_using_noreserve": false,
- "kernel_addr_check": true,
- "membus": {
- "point_of_coherency": true,
- "system": "system",
- "response_latency": 2,
- "cxx_class": "CoherentXBar",
- "forward_latency": 4,
- "clk_domain": "system.clk_domain",
- "width": 16,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "master": {
- "peer": [
- "system.physmem.port"
- ],
- "role": "MASTER"
- },
- "type": "CoherentXBar",
- "frontend_latency": 3,
- "slave": {
- "peer": [
- "system.system_port",
- "system.cpu.l2cache.mem_side"
- ],
- "role": "SLAVE"
- },
- "p_state_clk_gate_min": 1000,
- "snoop_filter": {
- "name": "snoop_filter",
- "system": "system",
- "max_capacity": 8388608,
- "eventq_index": 0,
- "cxx_class": "SnoopFilter",
- "path": "system.membus.snoop_filter",
- "type": "SnoopFilter",
- "lookup_latency": 1
- },
- "power_model": null,
- "path": "system.membus",
- "snoop_response_latency": 4,
- "name": "membus",
- "p_state_clk_gate_bins": 20,
- "use_default_range": false
- },
- "symbolfile": "",
- "readfile": "",
- "thermal_model": null,
- "cxx_class": "System",
- "work_begin_cpu_id_exit": -1,
- "load_offset": 0,
- "work_begin_exit_count": 0,
- "p_state_clk_gate_min": 1000,
- "memories": [
- "system.physmem"
- ],
- "work_begin_ckpt_count": 0,
- "clk_domain": {
- "name": "clk_domain",
- "clock": [
- 1000
- ],
- "init_perf_level": 0,
- "voltage_domain": "system.voltage_domain",
- "eventq_index": 0,
- "cxx_class": "SrcClockDomain",
- "path": "system.clk_domain",
- "type": "SrcClockDomain",
- "domain_id": -1
- },
- "mem_ranges": [],
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "dvfs_handler": {
- "enable": false,
- "name": "dvfs_handler",
- "sys_clk_domain": "system.clk_domain",
- "transition_latency": 100000000,
- "eventq_index": 0,
- "cxx_class": "DVFSHandler",
- "domains": [],
- "path": "system.dvfs_handler",
- "type": "DVFSHandler"
- },
- "work_end_exit_count": 0,
- "type": "System",
- "voltage_domain": {
- "name": "voltage_domain",
- "eventq_index": 0,
- "voltage": [
- "1.0"
- ],
- "cxx_class": "VoltageDomain",
- "path": "system.voltage_domain",
- "type": "VoltageDomain"
- },
- "cache_line_size": 64,
- "boot_osflags": "a",
- "system_port": {
- "peer": "system.membus.slave[0]",
- "role": "MASTER"
- },
- "physmem": {
- "static_frontend_latency": 10000,
- "tRFC": 260000,
- "activation_limit": 4,
- "in_addr_map": true,
- "IDD3N2": "0.0",
- "tWTR": 7500,
- "IDD52": "0.0",
- "clk_domain": "system.clk_domain",
- "channels": 1,
- "write_buffer_size": 64,
- "device_bus_width": 8,
- "VDD": "1.5",
- "write_high_thresh_perc": 85,
- "cxx_class": "DRAMCtrl",
- "bank_groups_per_rank": 0,
- "IDD2N2": "0.0",
- "port": {
- "peer": "system.membus.master[0]",
- "role": "SLAVE"
- },
- "tCCD_L": 0,
- "IDD2N": "0.032",
- "p_state_clk_gate_min": 1000,
- "null": false,
- "IDD2P1": "0.032",
- "eventq_index": 0,
- "tRRD": 6000,
- "tRTW": 2500,
- "IDD4R": "0.157",
- "burst_length": 8,
- "tRTP": 7500,
- "IDD4W": "0.125",
- "tWR": 15000,
- "banks_per_rank": 8,
- "devices_per_rank": 8,
- "IDD2P02": "0.0",
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "IDD6": "0.02",
- "IDD5": "0.235",
- "tRCD": 13750,
- "type": "DRAMCtrl",
- "IDD3P02": "0.0",
- "tRRD_L": 0,
- "IDD0": "0.055",
- "IDD62": "0.0",
- "min_writes_per_switch": 16,
- "mem_sched_policy": "frfcfs",
- "IDD02": "0.0",
- "IDD2P0": "0.0",
- "ranks_per_channel": 2,
- "page_policy": "open_adaptive",
- "IDD4W2": "0.0",
- "tCS": 2500,
- "power_model": null,
- "tCL": 13750,
- "read_buffer_size": 32,
- "conf_table_reported": true,
- "tCK": 1250,
- "tRAS": 35000,
- "tRP": 13750,
- "tBURST": 5000,
- "path": "system.physmem",
- "tXP": 6000,
- "tXS": 270000,
- "addr_mapping": "RoRaBaCoCh",
- "IDD3P0": "0.0",
- "IDD3P1": "0.038",
- "IDD3N": "0.038",
- "name": "physmem",
- "tXSDLL": 0,
- "device_size": 536870912,
- "kvm_map": true,
- "dll": true,
- "tXAW": 30000,
- "write_low_thresh_perc": 50,
- "range": "0:134217727:0:0:0:0",
- "VDD2": "0.0",
- "IDD2P12": "0.0",
- "p_state_clk_gate_bins": 20,
- "tXPDLL": 0,
- "IDD4R2": "0.0",
- "device_rowbuffer_size": 1024,
- "static_backend_latency": 10000,
- "max_accesses_per_row": 16,
- "IDD3P12": "0.0",
- "tREFI": 7800000
- },
- "power_model": null,
- "work_cpus_ckpt_count": 0,
- "thermal_components": [],
- "path": "system",
- "cpu_clk_domain": {
- "name": "cpu_clk_domain",
- "clock": [
- 500
- ],
- "init_perf_level": 0,
- "voltage_domain": "system.voltage_domain",
- "eventq_index": 0,
- "cxx_class": "SrcClockDomain",
- "path": "system.cpu_clk_domain",
- "type": "SrcClockDomain",
- "domain_id": -1
- },
- "work_end_ckpt_count": 0,
- "mem_mode": "timing",
- "name": "system",
- "init_param": 0,
- "p_state_clk_gate_bins": 20,
- "load_addr_mask": 1099511627775,
- "cpu": [
- {
- "max_insts_any_thread": 0,
- "do_statistics_insts": true,
- "numThreads": 1,
- "fetch1LineSnapWidth": 0,
- "fetch1ToFetch2BackwardDelay": 1,
- "fetch1FetchLimit": 1,
- "executeIssueLimit": 2,
- "system": "system",
- "executeLSQMaxStoreBufferStoresPerCycle": 2,
- "icache": {
- "cpu_side": {
- "peer": "system.cpu.icache_port",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 2,
- "cxx_class": "Cache",
- "size": 131072,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.cpu.toL2Bus.slave[0]",
- "role": "MASTER"
- },
- "mshrs": 4,
- "writeback_clean": true,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 131072,
- "tag_latency": 2,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 2,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.icache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 2
- },
- "tgts_per_mshr": 20,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": true,
- "prefetch_on_access": false,
- "path": "system.cpu.icache",
- "data_latency": 2,
- "tag_latency": 2,
- "name": "icache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 2
- },
- "function_trace": false,
- "do_checkpoint_insts": true,
- "decodeInputWidth": 2,
- "cxx_class": "MinorCPU",
- "max_loads_all_threads": 0,
- "executeMemoryIssueLimit": 1,
- "decodeCycleInput": true,
- "syscallRetryLatency": 10000,
- "max_loads_any_thread": 0,
- "executeLSQTransfersQueueSize": 2,
- "p_state_clk_gate_max": 1000000000000,
- "clk_domain": "system.cpu_clk_domain",
- "function_trace_start": 0,
- "cpu_id": 0,
- "checker": null,
- "eventq_index": 0,
- "executeMemoryWidth": 0,
- "default_p_state": "UNDEFINED",
- "executeBranchDelay": 1,
- "executeMemoryCommitLimit": 1,
- "l2cache": {
- "cpu_side": {
- "peer": "system.cpu.toL2Bus.master[0]",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 20,
- "cxx_class": "Cache",
- "size": 2097152,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.membus.slave[1]",
- "role": "MASTER"
- },
- "mshrs": 20,
- "writeback_clean": false,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 2097152,
- "tag_latency": 20,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 8,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.l2cache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 20
- },
- "tgts_per_mshr": 12,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": false,
- "prefetch_on_access": false,
- "path": "system.cpu.l2cache",
- "data_latency": 20,
- "tag_latency": 20,
- "name": "l2cache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 8
- },
- "do_quiesce": true,
- "type": "MinorCPU",
- "executeCycleInput": true,
- "executeAllowEarlyMemoryIssue": true,
- "executeInputBufferSize": 7,
- "icache_port": {
- "peer": "system.cpu.icache.cpu_side",
- "role": "MASTER"
- },
- "p_state_clk_gate_bins": 20,
- "socket_id": 0,
- "progress_interval": 0,
- "p_state_clk_gate_min": 1000,
- "toL2Bus": {
- "point_of_coherency": false,
- "system": "system",
- "response_latency": 1,
- "cxx_class": "CoherentXBar",
- "forward_latency": 0,
- "clk_domain": "system.cpu_clk_domain",
- "width": 32,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "master": {
- "peer": [
- "system.cpu.l2cache.cpu_side"
- ],
- "role": "MASTER"
- },
- "type": "CoherentXBar",
- "frontend_latency": 1,
- "slave": {
- "peer": [
- "system.cpu.icache.mem_side",
- "system.cpu.dcache.mem_side"
- ],
- "role": "SLAVE"
- },
- "p_state_clk_gate_min": 1000,
- "snoop_filter": {
- "name": "snoop_filter",
- "system": "system",
- "max_capacity": 8388608,
- "eventq_index": 0,
- "cxx_class": "SnoopFilter",
- "path": "system.cpu.toL2Bus.snoop_filter",
- "type": "SnoopFilter",
- "lookup_latency": 0
- },
- "power_model": null,
- "path": "system.cpu.toL2Bus",
- "snoop_response_latency": 1,
- "name": "toL2Bus",
- "p_state_clk_gate_bins": 20,
- "use_default_range": false
- },
- "isa": [
- {
- "eventq_index": 0,
- "path": "system.cpu.isa",
- "type": "RiscvISA",
- "name": "isa",
- "cxx_class": "RiscvISA::ISA"
- }
- ],
- "itb": {
- "name": "itb",
- "eventq_index": 0,
- "cxx_class": "RiscvISA::TLB",
- "path": "system.cpu.itb",
- "type": "RiscvTLB",
- "size": 64
- },
- "interrupts": [
- {
- "eventq_index": 0,
- "path": "system.cpu.interrupts",
- "type": "RiscvInterrupts",
- "name": "interrupts",
- "cxx_class": "RiscvISA::Interrupts"
- }
- ],
- "dcache_port": {
- "peer": "system.cpu.dcache.cpu_side",
- "role": "MASTER"
- },
- "executeFuncUnits": {
- "name": "executeFuncUnits",
- "eventq_index": 0,
- "cxx_class": "MinorFUPool",
- "path": "system.cpu.executeFuncUnits",
- "funcUnits": [
- {
- "issueLat": 1,
- "opLat": 3,
- "name": "funcUnits0",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "IntAlu",
- "name": "opClasses",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits0.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [
- {
- "extraAssumedLat": 0,
- "description": "Int",
- "srcRegsRelativeLats": [
- 2
- ],
- "suppress": false,
- "mask": 0,
- "extraCommitLat": 0,
- "eventq_index": 0,
- "opClasses": {
- "name": "opClasses",
- "opClasses": [],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits0.timings.opClasses",
- "type": "MinorOpClassSet"
- },
- "cxx_class": "MinorFUTiming",
- "path": "system.cpu.executeFuncUnits.funcUnits0.timings",
- "extraCommitLatExpr": null,
- "type": "MinorFUTiming",
- "match": 0,
- "name": "timings"
- }
- ],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits0",
- "type": "MinorFU"
- },
- {
- "issueLat": 1,
- "opLat": 3,
- "name": "funcUnits1",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "IntAlu",
- "name": "opClasses",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits1.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [
- {
- "extraAssumedLat": 0,
- "description": "Int",
- "srcRegsRelativeLats": [
- 2
- ],
- "suppress": false,
- "mask": 0,
- "extraCommitLat": 0,
- "eventq_index": 0,
- "opClasses": {
- "name": "opClasses",
- "opClasses": [],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits1.timings.opClasses",
- "type": "MinorOpClassSet"
- },
- "cxx_class": "MinorFUTiming",
- "path": "system.cpu.executeFuncUnits.funcUnits1.timings",
- "extraCommitLatExpr": null,
- "type": "MinorFUTiming",
- "match": 0,
- "name": "timings"
- }
- ],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits1",
- "type": "MinorFU"
- },
- {
- "issueLat": 1,
- "opLat": 3,
- "name": "funcUnits2",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "IntMult",
- "name": "opClasses",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits2.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [
- {
- "extraAssumedLat": 0,
- "description": "Mul",
- "srcRegsRelativeLats": [
- 0
- ],
- "suppress": false,
- "mask": 0,
- "extraCommitLat": 0,
- "eventq_index": 0,
- "opClasses": {
- "name": "opClasses",
- "opClasses": [],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits2.timings.opClasses",
- "type": "MinorOpClassSet"
- },
- "cxx_class": "MinorFUTiming",
- "path": "system.cpu.executeFuncUnits.funcUnits2.timings",
- "extraCommitLatExpr": null,
- "type": "MinorFUTiming",
- "match": 0,
- "name": "timings"
- }
- ],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits2",
- "type": "MinorFU"
- },
- {
- "issueLat": 9,
- "opLat": 9,
- "name": "funcUnits3",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "IntDiv",
- "name": "opClasses",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits3.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits3",
- "type": "MinorFU"
- },
- {
- "issueLat": 1,
- "opLat": 6,
- "name": "funcUnits4",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "FloatAdd",
- "name": "opClasses00",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatCmp",
- "name": "opClasses01",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatCvt",
- "name": "opClasses02",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatMisc",
- "name": "opClasses03",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatMult",
- "name": "opClasses04",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatMultAcc",
- "name": "opClasses05",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatDiv",
- "name": "opClasses06",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatSqrt",
- "name": "opClasses07",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdAdd",
- "name": "opClasses08",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdAddAcc",
- "name": "opClasses09",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdAlu",
- "name": "opClasses10",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdCmp",
- "name": "opClasses11",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdCvt",
- "name": "opClasses12",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdMisc",
- "name": "opClasses13",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdMult",
- "name": "opClasses14",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdMultAcc",
- "name": "opClasses15",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdShift",
- "name": "opClasses16",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdShiftAcc",
- "name": "opClasses17",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdSqrt",
- "name": "opClasses18",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatAdd",
- "name": "opClasses19",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatAlu",
- "name": "opClasses20",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatCmp",
- "name": "opClasses21",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatCvt",
- "name": "opClasses22",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatDiv",
- "name": "opClasses23",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatMisc",
- "name": "opClasses24",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatMult",
- "name": "opClasses25",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatMultAcc",
- "name": "opClasses26",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26",
- "type": "MinorOpClass"
- },
- {
- "opClass": "SimdFloatSqrt",
- "name": "opClasses27",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits4.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [
- {
- "extraAssumedLat": 0,
- "description": "FloatSimd",
- "srcRegsRelativeLats": [
- 2
- ],
- "suppress": false,
- "mask": 0,
- "extraCommitLat": 0,
- "eventq_index": 0,
- "opClasses": {
- "name": "opClasses",
- "opClasses": [],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits4.timings.opClasses",
- "type": "MinorOpClassSet"
- },
- "cxx_class": "MinorFUTiming",
- "path": "system.cpu.executeFuncUnits.funcUnits4.timings",
- "extraCommitLatExpr": null,
- "type": "MinorFUTiming",
- "match": 0,
- "name": "timings"
- }
- ],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits4",
- "type": "MinorFU"
- },
- {
- "issueLat": 1,
- "opLat": 1,
- "name": "funcUnits5",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "MemRead",
- "name": "opClasses0",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0",
- "type": "MinorOpClass"
- },
- {
- "opClass": "MemWrite",
- "name": "opClasses1",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatMemRead",
- "name": "opClasses2",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2",
- "type": "MinorOpClass"
- },
- {
- "opClass": "FloatMemWrite",
- "name": "opClasses3",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits5.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [
- {
- "extraAssumedLat": 2,
- "description": "Mem",
- "srcRegsRelativeLats": [
- 1
- ],
- "suppress": false,
- "mask": 0,
- "extraCommitLat": 0,
- "eventq_index": 0,
- "opClasses": {
- "name": "opClasses",
- "opClasses": [],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits5.timings.opClasses",
- "type": "MinorOpClassSet"
- },
- "cxx_class": "MinorFUTiming",
- "path": "system.cpu.executeFuncUnits.funcUnits5.timings",
- "extraCommitLatExpr": null,
- "type": "MinorFUTiming",
- "match": 0,
- "name": "timings"
- }
- ],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits5",
- "type": "MinorFU"
- },
- {
- "issueLat": 1,
- "opLat": 1,
- "name": "funcUnits6",
- "cantForwardFromFUIndices": [],
- "opClasses": {
- "name": "opClasses",
- "opClasses": [
- {
- "opClass": "IprAccess",
- "name": "opClasses0",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0",
- "type": "MinorOpClass"
- },
- {
- "opClass": "InstPrefetch",
- "name": "opClasses1",
- "eventq_index": 0,
- "cxx_class": "MinorOpClass",
- "path": "system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1",
- "type": "MinorOpClass"
- }
- ],
- "eventq_index": 0,
- "cxx_class": "MinorOpClassSet",
- "path": "system.cpu.executeFuncUnits.funcUnits6.opClasses",
- "type": "MinorOpClassSet"
- },
- "eventq_index": 0,
- "timings": [],
- "cxx_class": "MinorFU",
- "path": "system.cpu.executeFuncUnits.funcUnits6",
- "type": "MinorFU"
- }
- ],
- "type": "MinorFUPool"
- },
- "switched_out": false,
- "power_model": null,
- "max_insts_all_threads": 0,
- "executeSetTraceTimeOnIssue": false,
- "fetch2InputBufferSize": 2,
- "profile": 0,
- "fetch2ToDecodeForwardDelay": 1,
- "executeInputWidth": 2,
- "decodeToExecuteForwardDelay": 1,
- "executeLSQRequestsQueueSize": 1,
- "fetch2CycleInput": true,
- "executeMaxAccessesInMemory": 2,
- "enableIdling": true,
- "executeLSQStoreBufferSize": 5,
- "workload": [
- {
- "uid": 100,
- "pid": 100,
- "kvmInSE": false,
- "cxx_class": "Process",
- "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello",
- "drivers": [],
- "system": "system",
- "gid": 100,
- "eventq_index": 0,
- "env": [],
- "maxStackSize": 67108864,
- "ppid": 0,
- "type": "Process",
- "cwd": "",
- "pgid": 100,
- "simpoint": 0,
- "euid": 100,
- "input": "cin",
- "path": "system.cpu.workload",
- "name": "workload",
- "cmd": [
- "hello"
- ],
- "errout": "cerr",
- "useArchPT": false,
- "egid": 100,
- "output": "cout"
- }
- ],
- "name": "cpu",
- "wait_for_remote_gdb": false,
- "dtb": {
- "name": "dtb",
- "eventq_index": 0,
- "cxx_class": "RiscvISA::TLB",
- "path": "system.cpu.dtb",
- "type": "RiscvTLB",
- "size": 64
- },
- "simpoint_start_insts": [],
- "executeSetTraceTimeOnCommit": true,
- "tracer": {
- "eventq_index": 0,
- "path": "system.cpu.tracer",
- "type": "ExeTracer",
- "name": "tracer",
- "cxx_class": "Trace::ExeTracer"
- },
- "threadPolicy": "RoundRobin",
- "executeCommitLimit": 2,
- "fetch1LineWidth": 0,
- "branchPred": {
- "numThreads": 1,
- "BTBEntries": 4096,
- "cxx_class": "TournamentBP",
- "indirectPathLength": 3,
- "globalCtrBits": 2,
- "choicePredictorSize": 8192,
- "indirectHashGHR": true,
- "eventq_index": 0,
- "localHistoryTableSize": 2048,
- "type": "TournamentBP",
- "indirectSets": 256,
- "indirectWays": 2,
- "choiceCtrBits": 2,
- "useIndirect": true,
- "localCtrBits": 2,
- "path": "system.cpu.branchPred",
- "localPredictorSize": 2048,
- "RASSize": 16,
- "globalPredictorSize": 8192,
- "name": "branchPred",
- "indirectHashTargets": true,
- "instShiftAmt": 2,
- "indirectTagSize": 16,
- "BTBTagSize": 16
- },
- "dcache": {
- "cpu_side": {
- "peer": "system.cpu.dcache_port",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 2,
- "cxx_class": "Cache",
- "size": 262144,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.cpu.toL2Bus.slave[1]",
- "role": "MASTER"
- },
- "mshrs": 4,
- "writeback_clean": false,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 262144,
- "tag_latency": 2,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 2,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.dcache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 2
- },
- "tgts_per_mshr": 20,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": false,
- "prefetch_on_access": false,
- "path": "system.cpu.dcache",
- "data_latency": 2,
- "tag_latency": 2,
- "name": "dcache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 2
- },
- "path": "system.cpu",
- "fetch1ToFetch2ForwardDelay": 1,
- "decodeInputBufferSize": 3
- }
- ],
- "multi_thread": false,
- "exit_on_work_items": false,
- "work_item_id": -1,
- "num_work_ids": 16
- },
- "time_sync_period": 100000000000,
- "eventq_index": 0,
- "time_sync_spin_threshold": 100000000,
- "cxx_class": "Root",
- "path": "root",
- "time_sync_enable": false,
- "type": "Root",
- "full_system": false
-} \ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr
deleted file mode 100755
index 418a5c369..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simerr
+++ /dev/null
@@ -1,6 +0,0 @@
-warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0. Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
- Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout
deleted file mode 100755
index 19698a151..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/simout
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21568
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/minor-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 37069000 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt
deleted file mode 100644
index 74a4a69bc..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/stats.txt
+++ /dev/null
@@ -1,769 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000037
-sim_ticks 37069000
-final_tick 37069000
-sim_freq 1000000000000
-host_inst_rate 9833
-host_op_rate 9849
-host_tick_rate 65547568
-host_mem_usage 261772
-host_seconds 0.57
-sim_insts 5561
-sim_ops 5570
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 37069000
-system.physmem.bytes_read::cpu.inst 20864
-system.physmem.bytes_read::cpu.data 9344
-system.physmem.bytes_read::total 30208
-system.physmem.bytes_inst_read::cpu.inst 20864
-system.physmem.bytes_inst_read::total 20864
-system.physmem.num_reads::cpu.inst 326
-system.physmem.num_reads::cpu.data 146
-system.physmem.num_reads::total 472
-system.physmem.bw_read::cpu.inst 562842267
-system.physmem.bw_read::cpu.data 252070463
-system.physmem.bw_read::total 814912730
-system.physmem.bw_inst_read::cpu.inst 562842267
-system.physmem.bw_inst_read::total 562842267
-system.physmem.bw_total::cpu.inst 562842267
-system.physmem.bw_total::cpu.data 252070463
-system.physmem.bw_total::total 814912730
-system.physmem.readReqs 472
-system.physmem.writeReqs 0
-system.physmem.readBursts 472
-system.physmem.writeBursts 0
-system.physmem.bytesReadDRAM 30208
-system.physmem.bytesReadWrQ 0
-system.physmem.bytesWritten 0
-system.physmem.bytesReadSys 30208
-system.physmem.bytesWrittenSys 0
-system.physmem.servicedByWrQ 0
-system.physmem.mergedWrBursts 0
-system.physmem.neitherReadNorWriteReqs 0
-system.physmem.perBankRdBursts::0 31
-system.physmem.perBankRdBursts::1 0
-system.physmem.perBankRdBursts::2 34
-system.physmem.perBankRdBursts::3 21
-system.physmem.perBankRdBursts::4 68
-system.physmem.perBankRdBursts::5 91
-system.physmem.perBankRdBursts::6 70
-system.physmem.perBankRdBursts::7 58
-system.physmem.perBankRdBursts::8 57
-system.physmem.perBankRdBursts::9 33
-system.physmem.perBankRdBursts::10 0
-system.physmem.perBankRdBursts::11 3
-system.physmem.perBankRdBursts::12 4
-system.physmem.perBankRdBursts::13 1
-system.physmem.perBankRdBursts::14 1
-system.physmem.perBankRdBursts::15 0
-system.physmem.perBankWrBursts::0 0
-system.physmem.perBankWrBursts::1 0
-system.physmem.perBankWrBursts::2 0
-system.physmem.perBankWrBursts::3 0
-system.physmem.perBankWrBursts::4 0
-system.physmem.perBankWrBursts::5 0
-system.physmem.perBankWrBursts::6 0
-system.physmem.perBankWrBursts::7 0
-system.physmem.perBankWrBursts::8 0
-system.physmem.perBankWrBursts::9 0
-system.physmem.perBankWrBursts::10 0
-system.physmem.perBankWrBursts::11 0
-system.physmem.perBankWrBursts::12 0
-system.physmem.perBankWrBursts::13 0
-system.physmem.perBankWrBursts::14 0
-system.physmem.perBankWrBursts::15 0
-system.physmem.numRdRetry 0
-system.physmem.numWrRetry 0
-system.physmem.totGap 36987000
-system.physmem.readPktSize::0 0
-system.physmem.readPktSize::1 0
-system.physmem.readPktSize::2 0
-system.physmem.readPktSize::3 0
-system.physmem.readPktSize::4 0
-system.physmem.readPktSize::5 0
-system.physmem.readPktSize::6 472
-system.physmem.writePktSize::0 0
-system.physmem.writePktSize::1 0
-system.physmem.writePktSize::2 0
-system.physmem.writePktSize::3 0
-system.physmem.writePktSize::4 0
-system.physmem.writePktSize::5 0
-system.physmem.writePktSize::6 0
-system.physmem.rdQLenPdf::0 391
-system.physmem.rdQLenPdf::1 74
-system.physmem.rdQLenPdf::2 7
-system.physmem.rdQLenPdf::3 0
-system.physmem.rdQLenPdf::4 0
-system.physmem.rdQLenPdf::5 0
-system.physmem.rdQLenPdf::6 0
-system.physmem.rdQLenPdf::7 0
-system.physmem.rdQLenPdf::8 0
-system.physmem.rdQLenPdf::9 0
-system.physmem.rdQLenPdf::10 0
-system.physmem.rdQLenPdf::11 0
-system.physmem.rdQLenPdf::12 0
-system.physmem.rdQLenPdf::13 0
-system.physmem.rdQLenPdf::14 0
-system.physmem.rdQLenPdf::15 0
-system.physmem.rdQLenPdf::16 0
-system.physmem.rdQLenPdf::17 0
-system.physmem.rdQLenPdf::18 0
-system.physmem.rdQLenPdf::19 0
-system.physmem.rdQLenPdf::20 0
-system.physmem.rdQLenPdf::21 0
-system.physmem.rdQLenPdf::22 0
-system.physmem.rdQLenPdf::23 0
-system.physmem.rdQLenPdf::24 0
-system.physmem.rdQLenPdf::25 0
-system.physmem.rdQLenPdf::26 0
-system.physmem.rdQLenPdf::27 0
-system.physmem.rdQLenPdf::28 0
-system.physmem.rdQLenPdf::29 0
-system.physmem.rdQLenPdf::30 0
-system.physmem.rdQLenPdf::31 0
-system.physmem.wrQLenPdf::0 0
-system.physmem.wrQLenPdf::1 0
-system.physmem.wrQLenPdf::2 0
-system.physmem.wrQLenPdf::3 0
-system.physmem.wrQLenPdf::4 0
-system.physmem.wrQLenPdf::5 0
-system.physmem.wrQLenPdf::6 0
-system.physmem.wrQLenPdf::7 0
-system.physmem.wrQLenPdf::8 0
-system.physmem.wrQLenPdf::9 0
-system.physmem.wrQLenPdf::10 0
-system.physmem.wrQLenPdf::11 0
-system.physmem.wrQLenPdf::12 0
-system.physmem.wrQLenPdf::13 0
-system.physmem.wrQLenPdf::14 0
-system.physmem.wrQLenPdf::15 0
-system.physmem.wrQLenPdf::16 0
-system.physmem.wrQLenPdf::17 0
-system.physmem.wrQLenPdf::18 0
-system.physmem.wrQLenPdf::19 0
-system.physmem.wrQLenPdf::20 0
-system.physmem.wrQLenPdf::21 0
-system.physmem.wrQLenPdf::22 0
-system.physmem.wrQLenPdf::23 0
-system.physmem.wrQLenPdf::24 0
-system.physmem.wrQLenPdf::25 0
-system.physmem.wrQLenPdf::26 0
-system.physmem.wrQLenPdf::27 0
-system.physmem.wrQLenPdf::28 0
-system.physmem.wrQLenPdf::29 0
-system.physmem.wrQLenPdf::30 0
-system.physmem.wrQLenPdf::31 0
-system.physmem.wrQLenPdf::32 0
-system.physmem.wrQLenPdf::33 0
-system.physmem.wrQLenPdf::34 0
-system.physmem.wrQLenPdf::35 0
-system.physmem.wrQLenPdf::36 0
-system.physmem.wrQLenPdf::37 0
-system.physmem.wrQLenPdf::38 0
-system.physmem.wrQLenPdf::39 0
-system.physmem.wrQLenPdf::40 0
-system.physmem.wrQLenPdf::41 0
-system.physmem.wrQLenPdf::42 0
-system.physmem.wrQLenPdf::43 0
-system.physmem.wrQLenPdf::44 0
-system.physmem.wrQLenPdf::45 0
-system.physmem.wrQLenPdf::46 0
-system.physmem.wrQLenPdf::47 0
-system.physmem.wrQLenPdf::48 0
-system.physmem.wrQLenPdf::49 0
-system.physmem.wrQLenPdf::50 0
-system.physmem.wrQLenPdf::51 0
-system.physmem.wrQLenPdf::52 0
-system.physmem.wrQLenPdf::53 0
-system.physmem.wrQLenPdf::54 0
-system.physmem.wrQLenPdf::55 0
-system.physmem.wrQLenPdf::56 0
-system.physmem.wrQLenPdf::57 0
-system.physmem.wrQLenPdf::58 0
-system.physmem.wrQLenPdf::59 0
-system.physmem.wrQLenPdf::60 0
-system.physmem.wrQLenPdf::61 0
-system.physmem.wrQLenPdf::62 0
-system.physmem.wrQLenPdf::63 0
-system.physmem.bytesPerActivate::samples 88
-system.physmem.bytesPerActivate::mean 316.363636
-system.physmem.bytesPerActivate::gmean 211.085787
-system.physmem.bytesPerActivate::stdev 287.751896
-system.physmem.bytesPerActivate::0-127 24 27.27% 27.27%
-system.physmem.bytesPerActivate::128-255 19 21.59% 48.86%
-system.physmem.bytesPerActivate::256-383 18 20.45% 69.32%
-system.physmem.bytesPerActivate::384-511 8 9.09% 78.41%
-system.physmem.bytesPerActivate::512-639 5 5.68% 84.09%
-system.physmem.bytesPerActivate::640-767 4 4.55% 88.64%
-system.physmem.bytesPerActivate::768-895 2 2.27% 90.91%
-system.physmem.bytesPerActivate::896-1023 2 2.27% 93.18%
-system.physmem.bytesPerActivate::1024-1151 6 6.82% 100.00%
-system.physmem.bytesPerActivate::total 88
-system.physmem.totQLat 6564750
-system.physmem.totMemAccLat 15414750
-system.physmem.totBusLat 2360000
-system.physmem.avgQLat 13908.37
-system.physmem.avgBusLat 5000.00
-system.physmem.avgMemAccLat 32658.37
-system.physmem.avgRdBW 814.91
-system.physmem.avgWrBW 0.00
-system.physmem.avgRdBWSys 814.91
-system.physmem.avgWrBWSys 0.00
-system.physmem.peakBW 12800.00
-system.physmem.busUtil 6.37
-system.physmem.busUtilRead 6.37
-system.physmem.busUtilWrite 0.00
-system.physmem.avgRdQLen 1.21
-system.physmem.avgWrQLen 0.00
-system.physmem.readRowHits 375
-system.physmem.writeRowHits 0
-system.physmem.readRowHitRate 79.45
-system.physmem.writeRowHitRate nan
-system.physmem.avgGap 78362.29
-system.physmem.pageHitRate 79.45
-system.physmem_0.actEnergy 564060
-system.physmem_0.preEnergy 273240
-system.physmem_0.readEnergy 2663220
-system.physmem_0.writeEnergy 0
-system.physmem_0.refreshEnergy 2458560.000000
-system.physmem_0.actBackEnergy 5082120
-system.physmem_0.preBackEnergy 54240
-system.physmem_0.actPowerDownEnergy 11755680
-system.physmem_0.prePowerDownEnergy 1440
-system.physmem_0.selfRefreshEnergy 0
-system.physmem_0.totalEnergy 22852560
-system.physmem_0.averagePower 616.470461
-system.physmem_0.totalIdleTime 25554000
-system.physmem_0.memoryStateTime::IDLE 30000
-system.physmem_0.memoryStateTime::REF 1040000
-system.physmem_0.memoryStateTime::SREF 0
-system.physmem_0.memoryStateTime::PRE_PDN 3750
-system.physmem_0.memoryStateTime::ACT 10211750
-system.physmem_0.memoryStateTime::ACT_PDN 25783500
-system.physmem_1.actEnergy 128520
-system.physmem_1.preEnergy 60720
-system.physmem_1.readEnergy 706860
-system.physmem_1.writeEnergy 0
-system.physmem_1.refreshEnergy 2458560.000000
-system.physmem_1.actBackEnergy 1843380
-system.physmem_1.preBackEnergy 313920
-system.physmem_1.actPowerDownEnergy 13836180
-system.physmem_1.prePowerDownEnergy 717120
-system.physmem_1.selfRefreshEnergy 0
-system.physmem_1.totalEnergy 20065260
-system.physmem_1.averagePower 541.280281
-system.physmem_1.totalIdleTime 32167250
-system.physmem_1.memoryStateTime::IDLE 693000
-system.physmem_1.memoryStateTime::REF 1040000
-system.physmem_1.memoryStateTime::SREF 0
-system.physmem_1.memoryStateTime::PRE_PDN 1867000
-system.physmem_1.memoryStateTime::ACT 3123500
-system.physmem_1.memoryStateTime::ACT_PDN 30345500
-system.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.branchPred.lookups 2799
-system.cpu.branchPred.condPredicted 1837
-system.cpu.branchPred.condIncorrect 468
-system.cpu.branchPred.BTBLookups 2579
-system.cpu.branchPred.BTBHits 315
-system.cpu.branchPred.BTBCorrect 0
-system.cpu.branchPred.BTBHitPct 12.214036
-system.cpu.branchPred.usedRAS 0
-system.cpu.branchPred.RASInCorrect 0
-system.cpu.branchPred.indirectLookups 669
-system.cpu.branchPred.indirectHits 36
-system.cpu.branchPred.indirectMisses 633
-system.cpu.branchPredindirectMispredicted 173
-system.cpu_clk_domain.clock 500
-system.cpu.dtb.read_hits 0
-system.cpu.dtb.read_misses 0
-system.cpu.dtb.read_accesses 0
-system.cpu.dtb.write_hits 0
-system.cpu.dtb.write_misses 0
-system.cpu.dtb.write_accesses 0
-system.cpu.dtb.hits 0
-system.cpu.dtb.misses 0
-system.cpu.dtb.accesses 0
-system.cpu.itb.read_hits 0
-system.cpu.itb.read_misses 0
-system.cpu.itb.read_accesses 0
-system.cpu.itb.write_hits 0
-system.cpu.itb.write_misses 0
-system.cpu.itb.write_accesses 0
-system.cpu.itb.hits 0
-system.cpu.itb.misses 0
-system.cpu.itb.accesses 0
-system.cpu.workload.numSyscalls 9
-system.cpu.pwrStateResidencyTicks::ON 37069000
-system.cpu.numCycles 74138
-system.cpu.numWorkItemsStarted 0
-system.cpu.numWorkItemsCompleted 0
-system.cpu.committedInsts 5561
-system.cpu.committedOps 5570
-system.cpu.discardedOps 1479
-system.cpu.numFetchSuspends 0
-system.cpu.cpi 13.331775
-system.cpu.ipc 0.075009
-system.cpu.op_class_0::No_OpClass 10 0.18% 0.18%
-system.cpu.op_class_0::IntAlu 3392 60.90% 61.08%
-system.cpu.op_class_0::IntMult 2 0.04% 61.11%
-system.cpu.op_class_0::IntDiv 4 0.07% 61.18%
-system.cpu.op_class_0::FloatAdd 0 0.00% 61.18%
-system.cpu.op_class_0::FloatCmp 0 0.00% 61.18%
-system.cpu.op_class_0::FloatCvt 0 0.00% 61.18%
-system.cpu.op_class_0::FloatMult 0 0.00% 61.18%
-system.cpu.op_class_0::FloatMultAcc 0 0.00% 61.18%
-system.cpu.op_class_0::FloatDiv 0 0.00% 61.18%
-system.cpu.op_class_0::FloatMisc 0 0.00% 61.18%
-system.cpu.op_class_0::FloatSqrt 0 0.00% 61.18%
-system.cpu.op_class_0::SimdAdd 0 0.00% 61.18%
-system.cpu.op_class_0::SimdAddAcc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdAlu 0 0.00% 61.18%
-system.cpu.op_class_0::SimdCmp 0 0.00% 61.18%
-system.cpu.op_class_0::SimdCvt 0 0.00% 61.18%
-system.cpu.op_class_0::SimdMisc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdMult 0 0.00% 61.18%
-system.cpu.op_class_0::SimdMultAcc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdShift 0 0.00% 61.18%
-system.cpu.op_class_0::SimdShiftAcc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdSqrt 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatAdd 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatAlu 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatCmp 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatCvt 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatDiv 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatMisc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatMult 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 61.18%
-system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 61.18%
-system.cpu.op_class_0::MemRead 1082 19.43% 80.61%
-system.cpu.op_class_0::MemWrite 1068 19.17% 99.78%
-system.cpu.op_class_0::FloatMemRead 0 0.00% 99.78%
-system.cpu.op_class_0::FloatMemWrite 12 0.22% 100.00%
-system.cpu.op_class_0::IprAccess 0 0.00% 100.00%
-system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00%
-system.cpu.op_class_0::total 5570
-system.cpu.tickCycles 11297
-system.cpu.idleCycles 62841
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.dcache.tags.replacements 0
-system.cpu.dcache.tags.tagsinuse 87.218675
-system.cpu.dcache.tags.total_refs 2153
-system.cpu.dcache.tags.sampled_refs 146
-system.cpu.dcache.tags.avg_refs 14.746575
-system.cpu.dcache.tags.warmup_cycle 0
-system.cpu.dcache.tags.occ_blocks::cpu.data 87.218675
-system.cpu.dcache.tags.occ_percent::cpu.data 0.021294
-system.cpu.dcache.tags.occ_percent::total 0.021294
-system.cpu.dcache.tags.occ_task_id_blocks::1024 146
-system.cpu.dcache.tags.age_task_id_blocks_1024::0 21
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 125
-system.cpu.dcache.tags.occ_task_id_percent::1024 0.035645
-system.cpu.dcache.tags.tag_accesses 4860
-system.cpu.dcache.tags.data_accesses 4860
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.dcache.ReadReq_hits::cpu.data 1203
-system.cpu.dcache.ReadReq_hits::total 1203
-system.cpu.dcache.WriteReq_hits::cpu.data 935
-system.cpu.dcache.WriteReq_hits::total 935
-system.cpu.dcache.LoadLockedReq_hits::cpu.data 7
-system.cpu.dcache.LoadLockedReq_hits::total 7
-system.cpu.dcache.StoreCondReq_hits::cpu.data 8
-system.cpu.dcache.StoreCondReq_hits::total 8
-system.cpu.dcache.demand_hits::cpu.data 2138
-system.cpu.dcache.demand_hits::total 2138
-system.cpu.dcache.overall_hits::cpu.data 2138
-system.cpu.dcache.overall_hits::total 2138
-system.cpu.dcache.ReadReq_misses::cpu.data 66
-system.cpu.dcache.ReadReq_misses::total 66
-system.cpu.dcache.WriteReq_misses::cpu.data 137
-system.cpu.dcache.WriteReq_misses::total 137
-system.cpu.dcache.LoadLockedReq_misses::cpu.data 1
-system.cpu.dcache.LoadLockedReq_misses::total 1
-system.cpu.dcache.demand_misses::cpu.data 203
-system.cpu.dcache.demand_misses::total 203
-system.cpu.dcache.overall_misses::cpu.data 203
-system.cpu.dcache.overall_misses::total 203
-system.cpu.dcache.ReadReq_miss_latency::cpu.data 6029500
-system.cpu.dcache.ReadReq_miss_latency::total 6029500
-system.cpu.dcache.WriteReq_miss_latency::cpu.data 11079500
-system.cpu.dcache.WriteReq_miss_latency::total 11079500
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 77000
-system.cpu.dcache.LoadLockedReq_miss_latency::total 77000
-system.cpu.dcache.demand_miss_latency::cpu.data 17109000
-system.cpu.dcache.demand_miss_latency::total 17109000
-system.cpu.dcache.overall_miss_latency::cpu.data 17109000
-system.cpu.dcache.overall_miss_latency::total 17109000
-system.cpu.dcache.ReadReq_accesses::cpu.data 1269
-system.cpu.dcache.ReadReq_accesses::total 1269
-system.cpu.dcache.WriteReq_accesses::cpu.data 1072
-system.cpu.dcache.WriteReq_accesses::total 1072
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data 8
-system.cpu.dcache.LoadLockedReq_accesses::total 8
-system.cpu.dcache.StoreCondReq_accesses::cpu.data 8
-system.cpu.dcache.StoreCondReq_accesses::total 8
-system.cpu.dcache.demand_accesses::cpu.data 2341
-system.cpu.dcache.demand_accesses::total 2341
-system.cpu.dcache.overall_accesses::cpu.data 2341
-system.cpu.dcache.overall_accesses::total 2341
-system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.052009
-system.cpu.dcache.ReadReq_miss_rate::total 0.052009
-system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.127799
-system.cpu.dcache.WriteReq_miss_rate::total 0.127799
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.125000
-system.cpu.dcache.LoadLockedReq_miss_rate::total 0.125000
-system.cpu.dcache.demand_miss_rate::cpu.data 0.086715
-system.cpu.dcache.demand_miss_rate::total 0.086715
-system.cpu.dcache.overall_miss_rate::cpu.data 0.086715
-system.cpu.dcache.overall_miss_rate::total 0.086715
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 91356.060606
-system.cpu.dcache.ReadReq_avg_miss_latency::total 91356.060606
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 80872.262774
-system.cpu.dcache.WriteReq_avg_miss_latency::total 80872.262774
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 77000
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 77000
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 84280.788177
-system.cpu.dcache.demand_avg_miss_latency::total 84280.788177
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 84280.788177
-system.cpu.dcache.overall_avg_miss_latency::total 84280.788177
-system.cpu.dcache.blocked_cycles::no_mshrs 0
-system.cpu.dcache.blocked_cycles::no_targets 0
-system.cpu.dcache.blocked::no_mshrs 0
-system.cpu.dcache.blocked::no_targets 0
-system.cpu.dcache.avg_blocked_cycles::no_mshrs nan
-system.cpu.dcache.avg_blocked_cycles::no_targets nan
-system.cpu.dcache.ReadReq_mshr_hits::cpu.data 3
-system.cpu.dcache.ReadReq_mshr_hits::total 3
-system.cpu.dcache.WriteReq_mshr_hits::cpu.data 55
-system.cpu.dcache.WriteReq_mshr_hits::total 55
-system.cpu.dcache.demand_mshr_hits::cpu.data 58
-system.cpu.dcache.demand_mshr_hits::total 58
-system.cpu.dcache.overall_mshr_hits::cpu.data 58
-system.cpu.dcache.overall_mshr_hits::total 58
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data 63
-system.cpu.dcache.ReadReq_mshr_misses::total 63
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data 82
-system.cpu.dcache.WriteReq_mshr_misses::total 82
-system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 1
-system.cpu.dcache.LoadLockedReq_mshr_misses::total 1
-system.cpu.dcache.demand_mshr_misses::cpu.data 145
-system.cpu.dcache.demand_mshr_misses::total 145
-system.cpu.dcache.overall_mshr_misses::cpu.data 145
-system.cpu.dcache.overall_mshr_misses::total 145
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 5699500
-system.cpu.dcache.ReadReq_mshr_miss_latency::total 5699500
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 6895000
-system.cpu.dcache.WriteReq_mshr_miss_latency::total 6895000
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 76000
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 76000
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data 12594500
-system.cpu.dcache.demand_mshr_miss_latency::total 12594500
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data 12594500
-system.cpu.dcache.overall_mshr_miss_latency::total 12594500
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.049645
-system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.049645
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.076493
-system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.076493
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.125000
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.125000
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.061939
-system.cpu.dcache.demand_mshr_miss_rate::total 0.061939
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.061939
-system.cpu.dcache.overall_mshr_miss_rate::total 0.061939
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 90468.253968
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 90468.253968
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 84085.365854
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 84085.365854
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 76000
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 76000
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 86858.620690
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 86858.620690
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 86858.620690
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 86858.620690
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.icache.tags.replacements 0
-system.cpu.icache.tags.tagsinuse 161.452863
-system.cpu.icache.tags.total_refs 1852
-system.cpu.icache.tags.sampled_refs 326
-system.cpu.icache.tags.avg_refs 5.680982
-system.cpu.icache.tags.warmup_cycle 0
-system.cpu.icache.tags.occ_blocks::cpu.inst 161.452863
-system.cpu.icache.tags.occ_percent::cpu.inst 0.078834
-system.cpu.icache.tags.occ_percent::total 0.078834
-system.cpu.icache.tags.occ_task_id_blocks::1024 326
-system.cpu.icache.tags.age_task_id_blocks_1024::0 94
-system.cpu.icache.tags.age_task_id_blocks_1024::1 232
-system.cpu.icache.tags.occ_task_id_percent::1024 0.159180
-system.cpu.icache.tags.tag_accesses 4684
-system.cpu.icache.tags.data_accesses 4684
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.icache.ReadReq_hits::cpu.inst 1852
-system.cpu.icache.ReadReq_hits::total 1852
-system.cpu.icache.demand_hits::cpu.inst 1852
-system.cpu.icache.demand_hits::total 1852
-system.cpu.icache.overall_hits::cpu.inst 1852
-system.cpu.icache.overall_hits::total 1852
-system.cpu.icache.ReadReq_misses::cpu.inst 327
-system.cpu.icache.ReadReq_misses::total 327
-system.cpu.icache.demand_misses::cpu.inst 327
-system.cpu.icache.demand_misses::total 327
-system.cpu.icache.overall_misses::cpu.inst 327
-system.cpu.icache.overall_misses::total 327
-system.cpu.icache.ReadReq_miss_latency::cpu.inst 27853000
-system.cpu.icache.ReadReq_miss_latency::total 27853000
-system.cpu.icache.demand_miss_latency::cpu.inst 27853000
-system.cpu.icache.demand_miss_latency::total 27853000
-system.cpu.icache.overall_miss_latency::cpu.inst 27853000
-system.cpu.icache.overall_miss_latency::total 27853000
-system.cpu.icache.ReadReq_accesses::cpu.inst 2179
-system.cpu.icache.ReadReq_accesses::total 2179
-system.cpu.icache.demand_accesses::cpu.inst 2179
-system.cpu.icache.demand_accesses::total 2179
-system.cpu.icache.overall_accesses::cpu.inst 2179
-system.cpu.icache.overall_accesses::total 2179
-system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.150069
-system.cpu.icache.ReadReq_miss_rate::total 0.150069
-system.cpu.icache.demand_miss_rate::cpu.inst 0.150069
-system.cpu.icache.demand_miss_rate::total 0.150069
-system.cpu.icache.overall_miss_rate::cpu.inst 0.150069
-system.cpu.icache.overall_miss_rate::total 0.150069
-system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 85177.370031
-system.cpu.icache.ReadReq_avg_miss_latency::total 85177.370031
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 85177.370031
-system.cpu.icache.demand_avg_miss_latency::total 85177.370031
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 85177.370031
-system.cpu.icache.overall_avg_miss_latency::total 85177.370031
-system.cpu.icache.blocked_cycles::no_mshrs 0
-system.cpu.icache.blocked_cycles::no_targets 0
-system.cpu.icache.blocked::no_mshrs 0
-system.cpu.icache.blocked::no_targets 0
-system.cpu.icache.avg_blocked_cycles::no_mshrs nan
-system.cpu.icache.avg_blocked_cycles::no_targets nan
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst 327
-system.cpu.icache.ReadReq_mshr_misses::total 327
-system.cpu.icache.demand_mshr_misses::cpu.inst 327
-system.cpu.icache.demand_mshr_misses::total 327
-system.cpu.icache.overall_mshr_misses::cpu.inst 327
-system.cpu.icache.overall_mshr_misses::total 327
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 27527000
-system.cpu.icache.ReadReq_mshr_miss_latency::total 27527000
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst 27527000
-system.cpu.icache.demand_mshr_miss_latency::total 27527000
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst 27527000
-system.cpu.icache.overall_mshr_miss_latency::total 27527000
-system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.150069
-system.cpu.icache.ReadReq_mshr_miss_rate::total 0.150069
-system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.150069
-system.cpu.icache.demand_mshr_miss_rate::total 0.150069
-system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.150069
-system.cpu.icache.overall_mshr_miss_rate::total 0.150069
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 84180.428135
-system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 84180.428135
-system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 84180.428135
-system.cpu.icache.demand_avg_mshr_miss_latency::total 84180.428135
-system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 84180.428135
-system.cpu.icache.overall_avg_mshr_miss_latency::total 84180.428135
-system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.l2cache.tags.replacements 0
-system.cpu.l2cache.tags.tagsinuse 248.805234
-system.cpu.l2cache.tags.total_refs 0
-system.cpu.l2cache.tags.sampled_refs 472
-system.cpu.l2cache.tags.avg_refs 0
-system.cpu.l2cache.tags.warmup_cycle 0
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 161.545204
-system.cpu.l2cache.tags.occ_blocks::cpu.data 87.260030
-system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004930
-system.cpu.l2cache.tags.occ_percent::cpu.data 0.002663
-system.cpu.l2cache.tags.occ_percent::total 0.007593
-system.cpu.l2cache.tags.occ_task_id_blocks::1024 472
-system.cpu.l2cache.tags.age_task_id_blocks_1024::0 115
-system.cpu.l2cache.tags.age_task_id_blocks_1024::1 357
-system.cpu.l2cache.tags.occ_task_id_percent::1024 0.014404
-system.cpu.l2cache.tags.tag_accesses 4256
-system.cpu.l2cache.tags.data_accesses 4256
-system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.l2cache.ReadExReq_misses::cpu.data 82
-system.cpu.l2cache.ReadExReq_misses::total 82
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 327
-system.cpu.l2cache.ReadCleanReq_misses::total 327
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data 64
-system.cpu.l2cache.ReadSharedReq_misses::total 64
-system.cpu.l2cache.demand_misses::cpu.inst 327
-system.cpu.l2cache.demand_misses::cpu.data 146
-system.cpu.l2cache.demand_misses::total 473
-system.cpu.l2cache.overall_misses::cpu.inst 327
-system.cpu.l2cache.overall_misses::cpu.data 146
-system.cpu.l2cache.overall_misses::total 473
-system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 6772000
-system.cpu.l2cache.ReadExReq_miss_latency::total 6772000
-system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 27038000
-system.cpu.l2cache.ReadCleanReq_miss_latency::total 27038000
-system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 5679000
-system.cpu.l2cache.ReadSharedReq_miss_latency::total 5679000
-system.cpu.l2cache.demand_miss_latency::cpu.inst 27038000
-system.cpu.l2cache.demand_miss_latency::cpu.data 12451000
-system.cpu.l2cache.demand_miss_latency::total 39489000
-system.cpu.l2cache.overall_miss_latency::cpu.inst 27038000
-system.cpu.l2cache.overall_miss_latency::cpu.data 12451000
-system.cpu.l2cache.overall_miss_latency::total 39489000
-system.cpu.l2cache.ReadExReq_accesses::cpu.data 82
-system.cpu.l2cache.ReadExReq_accesses::total 82
-system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 327
-system.cpu.l2cache.ReadCleanReq_accesses::total 327
-system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 64
-system.cpu.l2cache.ReadSharedReq_accesses::total 64
-system.cpu.l2cache.demand_accesses::cpu.inst 327
-system.cpu.l2cache.demand_accesses::cpu.data 146
-system.cpu.l2cache.demand_accesses::total 473
-system.cpu.l2cache.overall_accesses::cpu.inst 327
-system.cpu.l2cache.overall_accesses::cpu.data 146
-system.cpu.l2cache.overall_accesses::total 473
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadExReq_miss_rate::total 1
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 1
-system.cpu.l2cache.ReadCleanReq_miss_rate::total 1
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadSharedReq_miss_rate::total 1
-system.cpu.l2cache.demand_miss_rate::cpu.inst 1
-system.cpu.l2cache.demand_miss_rate::cpu.data 1
-system.cpu.l2cache.demand_miss_rate::total 1
-system.cpu.l2cache.overall_miss_rate::cpu.inst 1
-system.cpu.l2cache.overall_miss_rate::cpu.data 1
-system.cpu.l2cache.overall_miss_rate::total 1
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 82585.365854
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 82585.365854
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 82685.015291
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 82685.015291
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 88734.375000
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 88734.375000
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 82685.015291
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 85280.821918
-system.cpu.l2cache.demand_avg_miss_latency::total 83486.257928
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 82685.015291
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 85280.821918
-system.cpu.l2cache.overall_avg_miss_latency::total 83486.257928
-system.cpu.l2cache.blocked_cycles::no_mshrs 0
-system.cpu.l2cache.blocked_cycles::no_targets 0
-system.cpu.l2cache.blocked::no_mshrs 0
-system.cpu.l2cache.blocked::no_targets 0
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan
-system.cpu.l2cache.avg_blocked_cycles::no_targets nan
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 82
-system.cpu.l2cache.ReadExReq_mshr_misses::total 82
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 327
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total 327
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 64
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total 64
-system.cpu.l2cache.demand_mshr_misses::cpu.inst 327
-system.cpu.l2cache.demand_mshr_misses::cpu.data 146
-system.cpu.l2cache.demand_mshr_misses::total 473
-system.cpu.l2cache.overall_mshr_misses::cpu.inst 327
-system.cpu.l2cache.overall_mshr_misses::cpu.data 146
-system.cpu.l2cache.overall_mshr_misses::total 473
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 5952000
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 5952000
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 23778000
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 23778000
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 5039000
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 5039000
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 23778000
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 10991000
-system.cpu.l2cache.demand_mshr_miss_latency::total 34769000
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 23778000
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 10991000
-system.cpu.l2cache.overall_mshr_miss_latency::total 34769000
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 1
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 1
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 1
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1
-system.cpu.l2cache.demand_mshr_miss_rate::total 1
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 1
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1
-system.cpu.l2cache.overall_mshr_miss_rate::total 1
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 72585.365854
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 72585.365854
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 72715.596330
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 72715.596330
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 78734.375000
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 78734.375000
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 72715.596330
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 75280.821918
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 73507.399577
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 72715.596330
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 75280.821918
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 73507.399577
-system.cpu.toL2Bus.snoop_filter.tot_requests 473
-system.cpu.toL2Bus.snoop_filter.hit_single_requests 0
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0
-system.cpu.toL2Bus.snoop_filter.tot_snoops 0
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 37069000
-system.cpu.toL2Bus.trans_dist::ReadResp 390
-system.cpu.toL2Bus.trans_dist::ReadExReq 82
-system.cpu.toL2Bus.trans_dist::ReadExResp 82
-system.cpu.toL2Bus.trans_dist::ReadCleanReq 327
-system.cpu.toL2Bus.trans_dist::ReadSharedReq 64
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 653
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 292
-system.cpu.toL2Bus.pkt_count::total 945
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20864
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9344
-system.cpu.toL2Bus.pkt_size::total 30208
-system.cpu.toL2Bus.snoops 0
-system.cpu.toL2Bus.snoopTraffic 0
-system.cpu.toL2Bus.snoop_fanout::samples 473
-system.cpu.toL2Bus.snoop_fanout::mean 0
-system.cpu.toL2Bus.snoop_fanout::stdev 0
-system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
-system.cpu.toL2Bus.snoop_fanout::0 473 100.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value 0
-system.cpu.toL2Bus.snoop_fanout::max_value 0
-system.cpu.toL2Bus.snoop_fanout::total 473
-system.cpu.toL2Bus.reqLayer0.occupancy 236500
-system.cpu.toL2Bus.reqLayer0.utilization 0.6
-system.cpu.toL2Bus.respLayer0.occupancy 489000
-system.cpu.toL2Bus.respLayer0.utilization 1.3
-system.cpu.toL2Bus.respLayer1.occupancy 219000
-system.cpu.toL2Bus.respLayer1.utilization 0.6
-system.membus.snoop_filter.tot_requests 472
-system.membus.snoop_filter.hit_single_requests 0
-system.membus.snoop_filter.hit_multi_requests 0
-system.membus.snoop_filter.tot_snoops 0
-system.membus.snoop_filter.hit_single_snoops 0
-system.membus.snoop_filter.hit_multi_snoops 0
-system.membus.pwrStateResidencyTicks::UNDEFINED 37069000
-system.membus.trans_dist::ReadResp 390
-system.membus.trans_dist::ReadExReq 82
-system.membus.trans_dist::ReadExResp 82
-system.membus.trans_dist::ReadSharedReq 390
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 944
-system.membus.pkt_count::total 944
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 30208
-system.membus.pkt_size::total 30208
-system.membus.snoops 0
-system.membus.snoopTraffic 0
-system.membus.snoop_fanout::samples 472
-system.membus.snoop_fanout::mean 0
-system.membus.snoop_fanout::stdev 0
-system.membus.snoop_fanout::underflows 0 0.00% 0.00%
-system.membus.snoop_fanout::0 472 100.00% 100.00%
-system.membus.snoop_fanout::1 0 0.00% 100.00%
-system.membus.snoop_fanout::overflows 0 0.00% 100.00%
-system.membus.snoop_fanout::min_value 0
-system.membus.snoop_fanout::max_value 0
-system.membus.snoop_fanout::total 472
-system.membus.reqLayer0.occupancy 530000
-system.membus.reqLayer0.utilization 1.4
-system.membus.respLayer1.occupancy 2511750
-system.membus.respLayer1.utilization 6.8
-
----------- End Simulation Statistics ----------