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Diffstat (limited to 'tests/quick/se/00.hello/ref/riscv/linux/simple-timing')
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini383
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json511
-rwxr-xr-xtests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr5
-rwxr-xr-xtests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout13
-rw-r--r--tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt533
5 files changed, 0 insertions, 1445 deletions
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini
deleted file mode 100644
index 9688a5846..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.ini
+++ /dev/null
@@ -1,383 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-wait_for_remote_gdb=false
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=RiscvInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=RiscvISA
-eventq_index=0
-
-[system.cpu.itb]
-type=RiscvTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=hello
-cwd=
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json
deleted file mode 100644
index 5efae3a06..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/config.json
+++ /dev/null
@@ -1,511 +0,0 @@
-{
- "name": null,
- "sim_quantum": 0,
- "system": {
- "kernel": "",
- "mmap_using_noreserve": false,
- "kernel_addr_check": true,
- "membus": {
- "point_of_coherency": true,
- "system": "system",
- "response_latency": 2,
- "cxx_class": "CoherentXBar",
- "forward_latency": 4,
- "clk_domain": "system.clk_domain",
- "width": 16,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "master": {
- "peer": [
- "system.physmem.port"
- ],
- "role": "MASTER"
- },
- "type": "CoherentXBar",
- "frontend_latency": 3,
- "slave": {
- "peer": [
- "system.system_port",
- "system.cpu.l2cache.mem_side"
- ],
- "role": "SLAVE"
- },
- "p_state_clk_gate_min": 1000,
- "snoop_filter": {
- "name": "snoop_filter",
- "system": "system",
- "max_capacity": 8388608,
- "eventq_index": 0,
- "cxx_class": "SnoopFilter",
- "path": "system.membus.snoop_filter",
- "type": "SnoopFilter",
- "lookup_latency": 1
- },
- "power_model": null,
- "path": "system.membus",
- "snoop_response_latency": 4,
- "name": "membus",
- "p_state_clk_gate_bins": 20,
- "use_default_range": false
- },
- "symbolfile": "",
- "readfile": "",
- "thermal_model": null,
- "cxx_class": "System",
- "work_begin_cpu_id_exit": -1,
- "load_offset": 0,
- "work_begin_exit_count": 0,
- "p_state_clk_gate_min": 1000,
- "memories": [
- "system.physmem"
- ],
- "work_begin_ckpt_count": 0,
- "clk_domain": {
- "name": "clk_domain",
- "clock": [
- 1000
- ],
- "init_perf_level": 0,
- "voltage_domain": "system.voltage_domain",
- "eventq_index": 0,
- "cxx_class": "SrcClockDomain",
- "path": "system.clk_domain",
- "type": "SrcClockDomain",
- "domain_id": -1
- },
- "mem_ranges": [],
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "dvfs_handler": {
- "enable": false,
- "name": "dvfs_handler",
- "sys_clk_domain": "system.clk_domain",
- "transition_latency": 100000000,
- "eventq_index": 0,
- "cxx_class": "DVFSHandler",
- "domains": [],
- "path": "system.dvfs_handler",
- "type": "DVFSHandler"
- },
- "work_end_exit_count": 0,
- "type": "System",
- "voltage_domain": {
- "name": "voltage_domain",
- "eventq_index": 0,
- "voltage": [
- "1.0"
- ],
- "cxx_class": "VoltageDomain",
- "path": "system.voltage_domain",
- "type": "VoltageDomain"
- },
- "cache_line_size": 64,
- "boot_osflags": "a",
- "system_port": {
- "peer": "system.membus.slave[0]",
- "role": "MASTER"
- },
- "physmem": {
- "range": "0:134217727:0:0:0:0",
- "latency": 30000,
- "name": "physmem",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "kvm_map": true,
- "clk_domain": "system.clk_domain",
- "power_model": null,
- "latency_var": 0,
- "bandwidth": "73.000000",
- "conf_table_reported": true,
- "cxx_class": "SimpleMemory",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.physmem",
- "null": false,
- "type": "SimpleMemory",
- "port": {
- "peer": "system.membus.master[0]",
- "role": "SLAVE"
- },
- "in_addr_map": true
- },
- "power_model": null,
- "work_cpus_ckpt_count": 0,
- "thermal_components": [],
- "path": "system",
- "cpu_clk_domain": {
- "name": "cpu_clk_domain",
- "clock": [
- 500
- ],
- "init_perf_level": 0,
- "voltage_domain": "system.voltage_domain",
- "eventq_index": 0,
- "cxx_class": "SrcClockDomain",
- "path": "system.cpu_clk_domain",
- "type": "SrcClockDomain",
- "domain_id": -1
- },
- "work_end_ckpt_count": 0,
- "mem_mode": "timing",
- "name": "system",
- "init_param": 0,
- "p_state_clk_gate_bins": 20,
- "load_addr_mask": 1099511627775,
- "cpu": [
- {
- "do_statistics_insts": true,
- "numThreads": 1,
- "itb": {
- "name": "itb",
- "eventq_index": 0,
- "cxx_class": "RiscvISA::TLB",
- "path": "system.cpu.itb",
- "type": "RiscvTLB",
- "size": 64
- },
- "system": "system",
- "icache": {
- "cpu_side": {
- "peer": "system.cpu.icache_port",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 2,
- "cxx_class": "Cache",
- "size": 131072,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.cpu.toL2Bus.slave[0]",
- "role": "MASTER"
- },
- "mshrs": 4,
- "writeback_clean": true,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 131072,
- "tag_latency": 2,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 2,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.icache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 2
- },
- "tgts_per_mshr": 20,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": true,
- "prefetch_on_access": false,
- "path": "system.cpu.icache",
- "data_latency": 2,
- "tag_latency": 2,
- "name": "icache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 2
- },
- "function_trace": false,
- "do_checkpoint_insts": true,
- "cxx_class": "TimingSimpleCPU",
- "max_loads_all_threads": 0,
- "clk_domain": "system.cpu_clk_domain",
- "function_trace_start": 0,
- "cpu_id": 0,
- "checker": null,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "toL2Bus": {
- "point_of_coherency": false,
- "system": "system",
- "response_latency": 1,
- "cxx_class": "CoherentXBar",
- "forward_latency": 0,
- "clk_domain": "system.cpu_clk_domain",
- "width": 32,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "master": {
- "peer": [
- "system.cpu.l2cache.cpu_side"
- ],
- "role": "MASTER"
- },
- "type": "CoherentXBar",
- "frontend_latency": 1,
- "slave": {
- "peer": [
- "system.cpu.icache.mem_side",
- "system.cpu.dcache.mem_side"
- ],
- "role": "SLAVE"
- },
- "p_state_clk_gate_min": 1000,
- "snoop_filter": {
- "name": "snoop_filter",
- "system": "system",
- "max_capacity": 8388608,
- "eventq_index": 0,
- "cxx_class": "SnoopFilter",
- "path": "system.cpu.toL2Bus.snoop_filter",
- "type": "SnoopFilter",
- "lookup_latency": 0
- },
- "power_model": null,
- "path": "system.cpu.toL2Bus",
- "snoop_response_latency": 1,
- "name": "toL2Bus",
- "p_state_clk_gate_bins": 20,
- "use_default_range": false
- },
- "do_quiesce": true,
- "type": "TimingSimpleCPU",
- "profile": 0,
- "icache_port": {
- "peer": "system.cpu.icache.cpu_side",
- "role": "MASTER"
- },
- "p_state_clk_gate_bins": 20,
- "p_state_clk_gate_min": 1000,
- "syscallRetryLatency": 10000,
- "interrupts": [
- {
- "eventq_index": 0,
- "path": "system.cpu.interrupts",
- "type": "RiscvInterrupts",
- "name": "interrupts",
- "cxx_class": "RiscvISA::Interrupts"
- }
- ],
- "dcache_port": {
- "peer": "system.cpu.dcache.cpu_side",
- "role": "MASTER"
- },
- "socket_id": 0,
- "power_model": null,
- "max_insts_all_threads": 0,
- "l2cache": {
- "cpu_side": {
- "peer": "system.cpu.toL2Bus.master[0]",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 20,
- "cxx_class": "Cache",
- "size": 2097152,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.membus.slave[1]",
- "role": "MASTER"
- },
- "mshrs": 20,
- "writeback_clean": false,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 2097152,
- "tag_latency": 20,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 8,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.l2cache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 20
- },
- "tgts_per_mshr": 12,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": false,
- "prefetch_on_access": false,
- "path": "system.cpu.l2cache",
- "data_latency": 20,
- "tag_latency": 20,
- "name": "l2cache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 8
- },
- "path": "system.cpu",
- "max_loads_any_thread": 0,
- "switched_out": false,
- "workload": [
- {
- "uid": 100,
- "pid": 100,
- "kvmInSE": false,
- "cxx_class": "Process",
- "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello",
- "drivers": [],
- "system": "system",
- "gid": 100,
- "eventq_index": 0,
- "env": [],
- "maxStackSize": 67108864,
- "ppid": 0,
- "type": "Process",
- "cwd": "",
- "pgid": 100,
- "simpoint": 0,
- "euid": 100,
- "input": "cin",
- "path": "system.cpu.workload",
- "name": "workload",
- "cmd": [
- "hello"
- ],
- "errout": "cerr",
- "useArchPT": false,
- "egid": 100,
- "output": "cout"
- }
- ],
- "name": "cpu",
- "wait_for_remote_gdb": false,
- "dtb": {
- "name": "dtb",
- "eventq_index": 0,
- "cxx_class": "RiscvISA::TLB",
- "path": "system.cpu.dtb",
- "type": "RiscvTLB",
- "size": 64
- },
- "simpoint_start_insts": [],
- "max_insts_any_thread": 0,
- "progress_interval": 0,
- "branchPred": null,
- "dcache": {
- "cpu_side": {
- "peer": "system.cpu.dcache_port",
- "role": "SLAVE"
- },
- "clusivity": "mostly_incl",
- "prefetcher": null,
- "system": "system",
- "write_buffers": 8,
- "response_latency": 2,
- "cxx_class": "Cache",
- "size": 262144,
- "type": "Cache",
- "clk_domain": "system.cpu_clk_domain",
- "max_miss_count": 0,
- "eventq_index": 0,
- "default_p_state": "UNDEFINED",
- "p_state_clk_gate_max": 1000000000000,
- "mem_side": {
- "peer": "system.cpu.toL2Bus.slave[1]",
- "role": "MASTER"
- },
- "mshrs": 4,
- "writeback_clean": false,
- "p_state_clk_gate_min": 1000,
- "tags": {
- "size": 262144,
- "tag_latency": 2,
- "name": "tags",
- "p_state_clk_gate_min": 1000,
- "eventq_index": 0,
- "p_state_clk_gate_bins": 20,
- "default_p_state": "UNDEFINED",
- "clk_domain": "system.cpu_clk_domain",
- "power_model": null,
- "sequential_access": false,
- "assoc": 2,
- "cxx_class": "LRU",
- "p_state_clk_gate_max": 1000000000000,
- "path": "system.cpu.dcache.tags",
- "block_size": 64,
- "type": "LRU",
- "data_latency": 2
- },
- "tgts_per_mshr": 20,
- "demand_mshr_reserve": 1,
- "power_model": null,
- "addr_ranges": [
- "0:18446744073709551615:0:0:0:0"
- ],
- "is_read_only": false,
- "prefetch_on_access": false,
- "path": "system.cpu.dcache",
- "data_latency": 2,
- "tag_latency": 2,
- "name": "dcache",
- "p_state_clk_gate_bins": 20,
- "sequential_access": false,
- "assoc": 2
- },
- "isa": [
- {
- "eventq_index": 0,
- "path": "system.cpu.isa",
- "type": "RiscvISA",
- "name": "isa",
- "cxx_class": "RiscvISA::ISA"
- }
- ],
- "tracer": {
- "eventq_index": 0,
- "path": "system.cpu.tracer",
- "type": "ExeTracer",
- "name": "tracer",
- "cxx_class": "Trace::ExeTracer"
- }
- }
- ],
- "multi_thread": false,
- "exit_on_work_items": false,
- "work_item_id": -1,
- "num_work_ids": 16
- },
- "time_sync_period": 100000000000,
- "eventq_index": 0,
- "time_sync_spin_threshold": 100000000,
- "cxx_class": "Root",
- "path": "root",
- "time_sync_enable": false,
- "type": "Root",
- "full_system": false
-} \ No newline at end of file
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr
deleted file mode 100755
index 183f48e06..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simerr
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-info: Entering event queue @ 0. Starting simulation...
-warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings.
- Returning '/home/ar4jc/gem5/tests/test-progs/hello/bin/riscv/linux/hello'
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout
deleted file mode 100755
index 4e80d20a2..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/simout
+++ /dev/null
@@ -1,13 +0,0 @@
-Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing/simout
-Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing/simerr
-gem5 Simulator System. http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Jul 13 2017 17:37:52
-gem5 started Jul 13 2017 18:03:36
-gem5 executing on boldrock, pid 21570
-command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/simple-timing
-
-Global frequency set at 1000000000000 ticks per second
-Hello world!
-Exiting @ tick 31821500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt
deleted file mode 100644
index 8480d3c97..000000000
--- a/tests/quick/se/00.hello/ref/riscv/linux/simple-timing/stats.txt
+++ /dev/null
@@ -1,533 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds 0.000032
-sim_ticks 31821500
-final_tick 31821500
-sim_freq 1000000000000
-host_inst_rate 11620
-host_op_rate 11638
-host_tick_rate 66593131
-host_mem_usage 258956
-host_seconds 0.48
-sim_insts 5552
-sim_ops 5561
-system.voltage_domain.voltage 1
-system.clk_domain.clock 1000
-system.physmem.pwrStateResidencyTicks::UNDEFINED 31821500
-system.physmem.bytes_read::cpu.inst 14592
-system.physmem.bytes_read::cpu.data 9216
-system.physmem.bytes_read::total 23808
-system.physmem.bytes_inst_read::cpu.inst 14592
-system.physmem.bytes_inst_read::total 14592
-system.physmem.num_reads::cpu.inst 228
-system.physmem.num_reads::cpu.data 144
-system.physmem.num_reads::total 372
-system.physmem.bw_read::cpu.inst 458557893
-system.physmem.bw_read::cpu.data 289615512
-system.physmem.bw_read::total 748173405
-system.physmem.bw_inst_read::cpu.inst 458557893
-system.physmem.bw_inst_read::total 458557893
-system.physmem.bw_total::cpu.inst 458557893
-system.physmem.bw_total::cpu.data 289615512
-system.physmem.bw_total::total 748173405
-system.pwrStateResidencyTicks::UNDEFINED 31821500
-system.cpu_clk_domain.clock 500
-system.cpu.dtb.read_hits 0
-system.cpu.dtb.read_misses 0
-system.cpu.dtb.read_accesses 0
-system.cpu.dtb.write_hits 0
-system.cpu.dtb.write_misses 0
-system.cpu.dtb.write_accesses 0
-system.cpu.dtb.hits 0
-system.cpu.dtb.misses 0
-system.cpu.dtb.accesses 0
-system.cpu.itb.read_hits 0
-system.cpu.itb.read_misses 0
-system.cpu.itb.read_accesses 0
-system.cpu.itb.write_hits 0
-system.cpu.itb.write_misses 0
-system.cpu.itb.write_accesses 0
-system.cpu.itb.hits 0
-system.cpu.itb.misses 0
-system.cpu.itb.accesses 0
-system.cpu.workload.numSyscalls 9
-system.cpu.pwrStateResidencyTicks::ON 31821500
-system.cpu.numCycles 63643
-system.cpu.numWorkItemsStarted 0
-system.cpu.numWorkItemsCompleted 0
-system.cpu.committedInsts 5552
-system.cpu.committedOps 5561
-system.cpu.num_int_alu_accesses 5498
-system.cpu.num_fp_alu_accesses 12
-system.cpu.num_vec_alu_accesses 0
-system.cpu.num_func_calls 282
-system.cpu.num_conditional_control_insts 914
-system.cpu.num_int_insts 5498
-system.cpu.num_fp_insts 12
-system.cpu.num_vec_insts 0
-system.cpu.num_int_register_reads 7038
-system.cpu.num_int_register_writes 3414
-system.cpu.num_fp_register_reads 12
-system.cpu.num_fp_register_writes 0
-system.cpu.num_vec_register_reads 0
-system.cpu.num_vec_register_writes 0
-system.cpu.num_mem_refs 2162
-system.cpu.num_load_insts 1082
-system.cpu.num_store_insts 1080
-system.cpu.num_idle_cycles 0
-system.cpu.num_busy_cycles 63643
-system.cpu.not_idle_fraction 1
-system.cpu.idle_fraction 0
-system.cpu.Branches 1196
-system.cpu.op_class::No_OpClass 10 0.18% 0.18%
-system.cpu.op_class::IntAlu 3392 60.90% 61.08%
-system.cpu.op_class::IntMult 2 0.04% 61.11%
-system.cpu.op_class::IntDiv 4 0.07% 61.18%
-system.cpu.op_class::FloatAdd 0 0.00% 61.18%
-system.cpu.op_class::FloatCmp 0 0.00% 61.18%
-system.cpu.op_class::FloatCvt 0 0.00% 61.18%
-system.cpu.op_class::FloatMult 0 0.00% 61.18%
-system.cpu.op_class::FloatMultAcc 0 0.00% 61.18%
-system.cpu.op_class::FloatDiv 0 0.00% 61.18%
-system.cpu.op_class::FloatMisc 0 0.00% 61.18%
-system.cpu.op_class::FloatSqrt 0 0.00% 61.18%
-system.cpu.op_class::SimdAdd 0 0.00% 61.18%
-system.cpu.op_class::SimdAddAcc 0 0.00% 61.18%
-system.cpu.op_class::SimdAlu 0 0.00% 61.18%
-system.cpu.op_class::SimdCmp 0 0.00% 61.18%
-system.cpu.op_class::SimdCvt 0 0.00% 61.18%
-system.cpu.op_class::SimdMisc 0 0.00% 61.18%
-system.cpu.op_class::SimdMult 0 0.00% 61.18%
-system.cpu.op_class::SimdMultAcc 0 0.00% 61.18%
-system.cpu.op_class::SimdShift 0 0.00% 61.18%
-system.cpu.op_class::SimdShiftAcc 0 0.00% 61.18%
-system.cpu.op_class::SimdSqrt 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatAdd 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatAlu 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatCmp 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatCvt 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatDiv 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatMisc 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatMult 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.18%
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.18%
-system.cpu.op_class::MemRead 1082 19.43% 80.61%
-system.cpu.op_class::MemWrite 1068 19.17% 99.78%
-system.cpu.op_class::FloatMemRead 0 0.00% 99.78%
-system.cpu.op_class::FloatMemWrite 12 0.22% 100.00%
-system.cpu.op_class::IprAccess 0 0.00% 100.00%
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
-system.cpu.op_class::total 5570
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 31821500
-system.cpu.dcache.tags.replacements 0
-system.cpu.dcache.tags.tagsinuse 86.061155
-system.cpu.dcache.tags.total_refs 2018
-system.cpu.dcache.tags.sampled_refs 144
-system.cpu.dcache.tags.avg_refs 14.013889
-system.cpu.dcache.tags.warmup_cycle 0
-system.cpu.dcache.tags.occ_blocks::cpu.data 86.061155
-system.cpu.dcache.tags.occ_percent::cpu.data 0.021011
-system.cpu.dcache.tags.occ_percent::total 0.021011
-system.cpu.dcache.tags.occ_task_id_blocks::1024 144
-system.cpu.dcache.tags.age_task_id_blocks_1024::0 30
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 114
-system.cpu.dcache.tags.occ_task_id_percent::1024 0.035156
-system.cpu.dcache.tags.tag_accesses 4468
-system.cpu.dcache.tags.data_accesses 4468
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 31821500
-system.cpu.dcache.ReadReq_hits::cpu.data 1013
-system.cpu.dcache.ReadReq_hits::total 1013
-system.cpu.dcache.WriteReq_hits::cpu.data 990
-system.cpu.dcache.WriteReq_hits::total 990
-system.cpu.dcache.LoadLockedReq_hits::cpu.data 7
-system.cpu.dcache.LoadLockedReq_hits::total 7
-system.cpu.dcache.StoreCondReq_hits::cpu.data 8
-system.cpu.dcache.StoreCondReq_hits::total 8
-system.cpu.dcache.demand_hits::cpu.data 2003
-system.cpu.dcache.demand_hits::total 2003
-system.cpu.dcache.overall_hits::cpu.data 2003
-system.cpu.dcache.overall_hits::total 2003
-system.cpu.dcache.ReadReq_misses::cpu.data 61
-system.cpu.dcache.ReadReq_misses::total 61
-system.cpu.dcache.WriteReq_misses::cpu.data 82
-system.cpu.dcache.WriteReq_misses::total 82
-system.cpu.dcache.LoadLockedReq_misses::cpu.data 1
-system.cpu.dcache.LoadLockedReq_misses::total 1
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-system.cpu.dcache.demand_misses::total 143
-system.cpu.dcache.overall_misses::cpu.data 143
-system.cpu.dcache.overall_misses::total 143
-system.cpu.dcache.ReadReq_miss_latency::cpu.data 3843000
-system.cpu.dcache.ReadReq_miss_latency::total 3843000
-system.cpu.dcache.WriteReq_miss_latency::cpu.data 5166000
-system.cpu.dcache.WriteReq_miss_latency::total 5166000
-system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 63000
-system.cpu.dcache.LoadLockedReq_miss_latency::total 63000
-system.cpu.dcache.demand_miss_latency::cpu.data 9009000
-system.cpu.dcache.demand_miss_latency::total 9009000
-system.cpu.dcache.overall_miss_latency::cpu.data 9009000
-system.cpu.dcache.overall_miss_latency::total 9009000
-system.cpu.dcache.ReadReq_accesses::cpu.data 1074
-system.cpu.dcache.ReadReq_accesses::total 1074
-system.cpu.dcache.WriteReq_accesses::cpu.data 1072
-system.cpu.dcache.WriteReq_accesses::total 1072
-system.cpu.dcache.LoadLockedReq_accesses::cpu.data 8
-system.cpu.dcache.LoadLockedReq_accesses::total 8
-system.cpu.dcache.StoreCondReq_accesses::cpu.data 8
-system.cpu.dcache.StoreCondReq_accesses::total 8
-system.cpu.dcache.demand_accesses::cpu.data 2146
-system.cpu.dcache.demand_accesses::total 2146
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-system.cpu.dcache.overall_accesses::total 2146
-system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.056797
-system.cpu.dcache.ReadReq_miss_rate::total 0.056797
-system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.076493
-system.cpu.dcache.WriteReq_miss_rate::total 0.076493
-system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.125000
-system.cpu.dcache.LoadLockedReq_miss_rate::total 0.125000
-system.cpu.dcache.demand_miss_rate::cpu.data 0.066636
-system.cpu.dcache.demand_miss_rate::total 0.066636
-system.cpu.dcache.overall_miss_rate::cpu.data 0.066636
-system.cpu.dcache.overall_miss_rate::total 0.066636
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63000
-system.cpu.dcache.ReadReq_avg_miss_latency::total 63000
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000
-system.cpu.dcache.WriteReq_avg_miss_latency::total 63000
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 63000
-system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 63000
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 63000
-system.cpu.dcache.demand_avg_miss_latency::total 63000
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 63000
-system.cpu.dcache.overall_avg_miss_latency::total 63000
-system.cpu.dcache.blocked_cycles::no_mshrs 0
-system.cpu.dcache.blocked_cycles::no_targets 0
-system.cpu.dcache.blocked::no_mshrs 0
-system.cpu.dcache.blocked::no_targets 0
-system.cpu.dcache.avg_blocked_cycles::no_mshrs nan
-system.cpu.dcache.avg_blocked_cycles::no_targets nan
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data 61
-system.cpu.dcache.ReadReq_mshr_misses::total 61
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data 82
-system.cpu.dcache.WriteReq_mshr_misses::total 82
-system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 1
-system.cpu.dcache.LoadLockedReq_mshr_misses::total 1
-system.cpu.dcache.demand_mshr_misses::cpu.data 143
-system.cpu.dcache.demand_mshr_misses::total 143
-system.cpu.dcache.overall_mshr_misses::cpu.data 143
-system.cpu.dcache.overall_mshr_misses::total 143
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 3782000
-system.cpu.dcache.ReadReq_mshr_miss_latency::total 3782000
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 5084000
-system.cpu.dcache.WriteReq_mshr_miss_latency::total 5084000
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 62000
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data 8866000
-system.cpu.dcache.demand_mshr_miss_latency::total 8866000
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data 8866000
-system.cpu.dcache.overall_mshr_miss_latency::total 8866000
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.056797
-system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.056797
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.076493
-system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.076493
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.125000
-system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.125000
-system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.066636
-system.cpu.dcache.demand_mshr_miss_rate::total 0.066636
-system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.066636
-system.cpu.dcache.overall_mshr_miss_rate::total 0.066636
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 62000
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 62000
-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 62000
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 62000
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 62000
-system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 31821500
-system.cpu.icache.tags.replacements 0
-system.cpu.icache.tags.tagsinuse 108.376290
-system.cpu.icache.tags.total_refs 6368
-system.cpu.icache.tags.sampled_refs 228
-system.cpu.icache.tags.avg_refs 27.929825
-system.cpu.icache.tags.warmup_cycle 0
-system.cpu.icache.tags.occ_blocks::cpu.inst 108.376290
-system.cpu.icache.tags.occ_percent::cpu.inst 0.052918
-system.cpu.icache.tags.occ_percent::total 0.052918
-system.cpu.icache.tags.occ_task_id_blocks::1024 228
-system.cpu.icache.tags.age_task_id_blocks_1024::0 82
-system.cpu.icache.tags.age_task_id_blocks_1024::1 146
-system.cpu.icache.tags.occ_task_id_percent::1024 0.111328
-system.cpu.icache.tags.tag_accesses 13420
-system.cpu.icache.tags.data_accesses 13420
-system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 31821500
-system.cpu.icache.ReadReq_hits::cpu.inst 6368
-system.cpu.icache.ReadReq_hits::total 6368
-system.cpu.icache.demand_hits::cpu.inst 6368
-system.cpu.icache.demand_hits::total 6368
-system.cpu.icache.overall_hits::cpu.inst 6368
-system.cpu.icache.overall_hits::total 6368
-system.cpu.icache.ReadReq_misses::cpu.inst 228
-system.cpu.icache.ReadReq_misses::total 228
-system.cpu.icache.demand_misses::cpu.inst 228
-system.cpu.icache.demand_misses::total 228
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-
----------- End Simulation Statistics ----------