diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt | 45 |
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt index 35c0c845e..bc4d8d180 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000028 # Nu sim_ticks 28358000 # Number of ticks simulated final_tick 28358000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 50744 # Simulator instruction rate (inst/s) -host_op_rate 91910 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 267330545 # Simulator tick rate (ticks/s) -host_mem_usage 295388 # Number of bytes of host memory used -host_seconds 0.11 # Real time elapsed on the host +host_inst_rate 260669 # Simulator instruction rate (inst/s) +host_op_rate 471875 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1371807276 # Simulator tick rate (ticks/s) +host_mem_usage 281320 # Number of bytes of host memory used +host_seconds 0.02 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -74,6 +74,41 @@ system.cpu.num_busy_cycles 56716 # Nu system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 1208 # Number of branches fetched +system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction +system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction +system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction +system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction +system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction +system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 9748 # Class of executed instruction system.cpu.icache.tags.replacements 0 # number of replacements system.cpu.icache.tags.tagsinuse 105.550219 # Cycle average of tags in use system.cpu.icache.tags.total_refs 6637 # Total number of references to valid blocks. |