diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt index 1e89d36d4..4b1ad61d2 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt @@ -1,14 +1,14 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000029 # Number of seconds simulated -sim_ticks 28768000 # Number of ticks simulated -final_tick 28768000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000030 # Number of seconds simulated +sim_ticks 29726000 # Number of ticks simulated +final_tick 29726000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 318234 # Simulator instruction rate (inst/s) -host_op_rate 575684 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1686451163 # Simulator tick rate (ticks/s) -host_mem_usage 223048 # Number of bytes of host memory used -host_seconds 0.02 # Real time elapsed on the host +host_inst_rate 107097 # Simulator instruction rate (inst/s) +host_op_rate 193883 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 587308683 # Simulator tick rate (ticks/s) +host_mem_usage 226300 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 5417 # Number of instructions simulated sim_ops 9810 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 14528 # Number of bytes read from this memory @@ -19,16 +19,16 @@ system.physmem.bytes_inst_read::total 14528 # Nu system.physmem.num_reads::cpu.inst 227 # Number of read requests responded to by this memory system.physmem.num_reads::cpu.data 134 # Number of read requests responded to by this memory system.physmem.num_reads::total 361 # Number of read requests responded to by this memory -system.physmem.bw_read::cpu.inst 505005562 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 298109010 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 803114572 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu.inst 505005562 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 505005562 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 505005562 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 298109010 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 803114572 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_read::cpu.inst 488730404 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 288501648 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 777232053 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 488730404 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 488730404 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 488730404 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 288501648 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 777232053 # Total bandwidth to/from this memory (bytes/s) system.cpu.workload.num_syscalls 11 # Number of system calls -system.cpu.numCycles 57536 # number of cpu cycles simulated +system.cpu.numCycles 59452 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 5417 # Number of instructions committed @@ -47,18 +47,18 @@ system.cpu.num_mem_refs 1990 # nu system.cpu.num_load_insts 1056 # Number of load instructions system.cpu.num_store_insts 934 # Number of store instructions system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_busy_cycles 57536 # Number of busy cycles +system.cpu.num_busy_cycles 59452 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.icache.replacements 0 # number of replacements -system.cpu.icache.tagsinuse 105.363985 # Cycle average of tags in use +system.cpu.icache.tagsinuse 105.590396 # Cycle average of tags in use system.cpu.icache.total_refs 6683 # Total number of references to valid blocks. system.cpu.icache.sampled_refs 228 # Sample count of references to valid blocks. system.cpu.icache.avg_refs 29.311404 # Average number of references to valid blocks. system.cpu.icache.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.occ_blocks::cpu.inst 105.363985 # Average occupied blocks per requestor -system.cpu.icache.occ_percent::cpu.inst 0.051447 # Average percentage of cache occupancy -system.cpu.icache.occ_percent::total 0.051447 # Average percentage of cache occupancy +system.cpu.icache.occ_blocks::cpu.inst 105.590396 # Average occupied blocks per requestor +system.cpu.icache.occ_percent::cpu.inst 0.051558 # Average percentage of cache occupancy +system.cpu.icache.occ_percent::total 0.051558 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 6683 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 6683 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 6683 # number of demand (read+write) hits @@ -129,14 +129,14 @@ system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52815.789474 system.cpu.icache.overall_avg_mshr_miss_latency::total 52815.789474 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.dcache.replacements 0 # number of replacements -system.cpu.dcache.tagsinuse 80.668870 # Cycle average of tags in use +system.cpu.dcache.tagsinuse 80.767478 # Cycle average of tags in use system.cpu.dcache.total_refs 1856 # Total number of references to valid blocks. system.cpu.dcache.sampled_refs 134 # Sample count of references to valid blocks. system.cpu.dcache.avg_refs 13.850746 # Average number of references to valid blocks. system.cpu.dcache.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.occ_blocks::cpu.data 80.668870 # Average occupied blocks per requestor -system.cpu.dcache.occ_percent::cpu.data 0.019695 # Average percentage of cache occupancy -system.cpu.dcache.occ_percent::total 0.019695 # Average percentage of cache occupancy +system.cpu.dcache.occ_blocks::cpu.data 80.767478 # Average occupied blocks per requestor +system.cpu.dcache.occ_percent::cpu.data 0.019719 # Average percentage of cache occupancy +system.cpu.dcache.occ_percent::total 0.019719 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1001 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1001 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 855 # number of WriteReq hits @@ -227,16 +227,16 @@ system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 53000 system.cpu.dcache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.l2cache.replacements 0 # number of replacements -system.cpu.l2cache.tagsinuse 133.809342 # Cycle average of tags in use +system.cpu.l2cache.tagsinuse 134.079161 # Cycle average of tags in use system.cpu.l2cache.total_refs 1 # Total number of references to valid blocks. system.cpu.l2cache.sampled_refs 282 # Sample count of references to valid blocks. system.cpu.l2cache.avg_refs 0.003546 # Average number of references to valid blocks. system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.occ_blocks::cpu.inst 105.370729 # Average occupied blocks per requestor -system.cpu.l2cache.occ_blocks::cpu.data 28.438613 # Average occupied blocks per requestor -system.cpu.l2cache.occ_percent::cpu.inst 0.003216 # Average percentage of cache occupancy -system.cpu.l2cache.occ_percent::cpu.data 0.000868 # Average percentage of cache occupancy -system.cpu.l2cache.occ_percent::total 0.004084 # Average percentage of cache occupancy +system.cpu.l2cache.occ_blocks::cpu.inst 105.593760 # Average occupied blocks per requestor +system.cpu.l2cache.occ_blocks::cpu.data 28.485401 # Average occupied blocks per requestor +system.cpu.l2cache.occ_percent::cpu.inst 0.003222 # Average percentage of cache occupancy +system.cpu.l2cache.occ_percent::cpu.data 0.000869 # Average percentage of cache occupancy +system.cpu.l2cache.occ_percent::total 0.004092 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits |