diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref')
28 files changed, 114 insertions, 134 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini index dce50f688..b09aafac2 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout index ab8450b87..589b57e2d 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing/simout -Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 24 2013 03:08:53 -gem5 started Sep 28 2013 03:05:26 +gem5 compiled Oct 15 2013 18:24:51 +gem5 started Oct 16 2013 01:34:33 gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt index 60f469d0d..31fc74f80 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000021 # Nu sim_ticks 20671000 # Number of ticks simulated final_tick 20671000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 24570 # Simulator instruction rate (inst/s) -host_op_rate 24568 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 79697022 # Simulator tick rate (ticks/s) -host_mem_usage 227340 # Number of bytes of host memory used -host_seconds 0.26 # Real time elapsed on the host +host_inst_rate 10783 # Simulator instruction rate (inst/s) +host_op_rate 10783 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 34979840 # Simulator tick rate (ticks/s) +host_mem_usage 229184 # Number of bytes of host memory used +host_seconds 0.59 # Real time elapsed on the host sim_insts 6372 # Number of instructions simulated sim_ops 6372 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 20032 # Number of bytes read from this memory @@ -301,8 +301,8 @@ system.cpu.rename.IQFullEvents 5 # Nu system.cpu.rename.LSQFullEvents 313 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 10969 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 18250 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 18233 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 17 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 18241 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 8 # Number of floating rename lookups system.cpu.rename.CommittedMaps 4570 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 6399 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 29 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini index c5e8a16e6..b9dbe7d51 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout index c47a79c1f..4cf5ca9ef 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simout -Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 24 2013 03:08:53 -gem5 started Sep 28 2013 03:05:27 +gem5 compiled Oct 15 2013 18:24:51 +gem5 started Oct 16 2013 01:34:33 gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt index 746096984..2906fdf0c 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000012 # Nu sim_ticks 11933500 # Number of ticks simulated final_tick 11933500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 64 # Simulator instruction rate (inst/s) -host_op_rate 64 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 321705 # Simulator tick rate (ticks/s) -host_mem_usage 226036 # Number of bytes of host memory used -host_seconds 37.09 # Real time elapsed on the host +host_inst_rate 3639 # Simulator instruction rate (inst/s) +host_op_rate 3638 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 18189727 # Simulator tick rate (ticks/s) +host_mem_usage 227880 # Number of bytes of host memory used +host_seconds 0.66 # Real time elapsed on the host sim_insts 2387 # Number of instructions simulated sim_ops 2387 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 12032 # Number of bytes read from this memory @@ -298,8 +298,8 @@ system.cpu.rename.IQFullEvents 14 # Nu system.cpu.rename.LSQFullEvents 13 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 4285 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 6686 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 6674 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 12 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 6679 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 6 # Number of floating rename lookups system.cpu.rename.CommittedMaps 1768 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 2517 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 8 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini index a65f6cef4..91966eab0 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout index ceaa08d85..47104f06c 100755 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout -Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 07:58:36 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 01:55:20 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt index 81f115ce9..ca5a55de6 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000016 # Nu sim_ticks 16494000 # Number of ticks simulated final_tick 16494000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 32065 # Simulator instruction rate (inst/s) -host_op_rate 40006 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 115159682 # Simulator tick rate (ticks/s) -host_mem_usage 240696 # Number of bytes of host memory used -host_seconds 0.14 # Real time elapsed on the host +host_inst_rate 19652 # Simulator instruction rate (inst/s) +host_op_rate 24522 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 70593484 # Simulator tick rate (ticks/s) +host_mem_usage 246136 # Number of bytes of host memory used +host_seconds 0.23 # Real time elapsed on the host sim_insts 4591 # Number of instructions simulated sim_ops 5729 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17344 # Number of bytes read from this memory @@ -354,8 +354,8 @@ system.cpu.rename.IQFullEvents 9 # Nu system.cpu.rename.LSQFullEvents 174 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 12464 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 56458 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 56202 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 256 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 51511 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 32 # Number of floating rename lookups system.cpu.rename.CommittedMaps 5673 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 6791 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 41 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini index c7dae4bd5..507cb5799 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout index 91a377601..d3be13c32 100755 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simout -Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 09:14:18 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 01:55:13 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt index ace16d792..add5a91d0 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000016 # Nu sim_ticks 16494000 # Number of ticks simulated final_tick 16494000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 36590 # Simulator instruction rate (inst/s) -host_op_rate 45651 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 131406771 # Simulator tick rate (ticks/s) -host_mem_usage 240696 # Number of bytes of host memory used -host_seconds 0.13 # Real time elapsed on the host +host_inst_rate 22159 # Simulator instruction rate (inst/s) +host_op_rate 27650 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 79599293 # Simulator tick rate (ticks/s) +host_mem_usage 246136 # Number of bytes of host memory used +host_seconds 0.21 # Real time elapsed on the host sim_insts 4591 # Number of instructions simulated sim_ops 5729 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17344 # Number of bytes read from this memory @@ -309,8 +309,8 @@ system.cpu.rename.IQFullEvents 9 # Nu system.cpu.rename.LSQFullEvents 174 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 12464 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 56458 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 56202 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 256 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 51511 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 32 # Number of floating rename lookups system.cpu.rename.CommittedMaps 5673 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 6791 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 41 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini index daf8c58a2..8335373d5 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout index 64f5582df..a390bccf8 100755 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simout -Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 05:51:54 -gem5 started Sep 22 2013 05:52:09 +gem5 compiled Oct 16 2013 01:28:28 +gem5 started Oct 16 2013 01:35:02 gem5 executing on zizzer command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing -re tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt index f0a85d261..423a70e1a 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000022 # Nu sim_ticks 21805500 # Number of ticks simulated final_tick 21805500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 44396 # Simulator instruction rate (inst/s) -host_op_rate 44386 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 187676879 # Simulator tick rate (ticks/s) -host_mem_usage 228012 # Number of bytes of host memory used -host_seconds 0.12 # Real time elapsed on the host +host_inst_rate 31004 # Simulator instruction rate (inst/s) +host_op_rate 31001 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 131093072 # Simulator tick rate (ticks/s) +host_mem_usage 229800 # Number of bytes of host memory used +host_seconds 0.17 # Real time elapsed on the host sim_insts 5156 # Number of instructions simulated sim_ops 5156 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 21440 # Number of bytes read from this memory @@ -286,8 +286,8 @@ system.cpu.rename.IQFullEvents 6 # Nu system.cpu.rename.LSQFullEvents 124 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 7186 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 14116 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 14112 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 4 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 13887 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 3 # Number of floating rename lookups system.cpu.rename.CommittedMaps 3398 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 3788 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 16 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini index 92f5ec07b..3e13ce8e1 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini @@ -87,6 +87,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout index 14f2d2615..92c45258c 100755 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simout -Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 05:59:47 -gem5 started Sep 22 2013 05:59:59 +gem5 compiled Oct 16 2013 01:29:56 +gem5 started Oct 16 2013 01:35:14 gem5 executing on zizzer command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing -re tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt index 9bd3a3844..bf93774ff 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000018 # Nu sim_ticks 18469500 # Number of ticks simulated final_tick 18469500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 100626 # Simulator instruction rate (inst/s) -host_op_rate 100602 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 320728752 # Simulator tick rate (ticks/s) -host_mem_usage 223260 # Number of bytes of host memory used -host_seconds 0.06 # Real time elapsed on the host +host_inst_rate 33738 # Simulator instruction rate (inst/s) +host_op_rate 33735 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 107564291 # Simulator tick rate (ticks/s) +host_mem_usage 225768 # Number of bytes of host memory used +host_seconds 0.17 # Real time elapsed on the host sim_insts 5792 # Number of instructions simulated sim_ops 5792 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 22080 # Number of bytes read from this memory @@ -285,8 +285,8 @@ system.cpu.rename.IQFullEvents 4 # Nu system.cpu.rename.LSQFullEvents 226 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 9701 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 18192 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 18137 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 55 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 18166 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 26 # Number of floating rename lookups system.cpu.rename.CommittedMaps 4998 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 4703 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 27 # count of serializing insts renamed diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini index 3ff31f398..12dff19e9 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=true numIQEntries=64 +numPhysCCRegs=1280 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout index 2fb7489b2..6fd808106 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simout -Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 06:21:20 -gem5 started Sep 22 2013 06:21:36 +gem5 compiled Oct 16 2013 01:35:57 +gem5 started Oct 16 2013 01:54:57 gem5 executing on zizzer command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt index cfacb8ad4..45776fad9 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000020 # Nu sim_ticks 19639500 # Number of ticks simulated final_tick 19639500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 30549 # Simulator instruction rate (inst/s) -host_op_rate 55338 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 111488682 # Simulator tick rate (ticks/s) -host_mem_usage 243516 # Number of bytes of host memory used -host_seconds 0.18 # Real time elapsed on the host +host_inst_rate 27608 # Simulator instruction rate (inst/s) +host_op_rate 50013 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 100764572 # Simulator tick rate (ticks/s) +host_mem_usage 247304 # Number of bytes of host memory used +host_seconds 0.20 # Real time elapsed on the host sim_insts 5380 # Number of instructions simulated sim_ops 9747 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17536 # Number of bytes read from this memory @@ -267,8 +267,8 @@ system.cpu.rename.IQFullEvents 35 # Nu system.cpu.rename.LSQFullEvents 666 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 25267 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 55251 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 55235 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 16 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 31469 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 4 # Number of floating rename lookups system.cpu.rename.CommittedMaps 11063 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 14204 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 30 # count of serializing insts renamed @@ -452,7 +452,7 @@ system.cpu.commit.loads 1053 # Nu system.cpu.commit.membars 0 # Number of memory barriers committed system.cpu.commit.branches 1208 # Number of branches committed system.cpu.commit.fp_insts 0 # Number of committed floating point instructions. -system.cpu.commit.int_insts 9654 # Number of committed integer instructions. +system.cpu.commit.int_insts 9653 # Number of committed integer instructions. system.cpu.commit.function_calls 106 # Number of function calls committed. system.cpu.commit.bw_lim_events 212 # number cycles where commit BW limit reached system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits @@ -467,9 +467,11 @@ system.cpu.cpi 7.301115 # CP system.cpu.cpi_total 7.301115 # CPI: Total CPI of All Threads system.cpu.ipc 0.136965 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.136965 # IPC: Total IPC of All Threads -system.cpu.int_regfile_reads 28824 # number of integer regfile reads -system.cpu.int_regfile_writes 17237 # number of integer regfile writes +system.cpu.int_regfile_reads 20780 # number of integer regfile reads +system.cpu.int_regfile_writes 12385 # number of integer regfile writes system.cpu.fp_regfile_reads 4 # number of floating regfile reads +system.cpu.cc_regfile_reads 8044 # number of cc regfile reads +system.cpu.cc_regfile_writes 4852 # number of cc regfile writes system.cpu.misc_regfile_reads 7122 # number of misc regfile reads system.cpu.misc_regfile_writes 1 # number of misc regfile writes system.cpu.toL2Bus.throughput 1362152804 # Throughput (bytes/s) diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout index 5c187d2d2..551fc8a46 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simout -Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 06:21:20 -gem5 started Sep 22 2013 06:21:50 +gem5 compiled Oct 16 2013 01:35:57 +gem5 started Oct 16 2013 01:45:55 gem5 executing on zizzer command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt index 3b513d323..34f6daec3 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000006 # Nu sim_ticks 5615000 # Number of ticks simulated final_tick 5615000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 70800 # Simulator instruction rate (inst/s) -host_op_rate 128226 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 73842503 # Simulator tick rate (ticks/s) -host_mem_usage 280580 # Number of bytes of host memory used -host_seconds 0.08 # Real time elapsed on the host +host_inst_rate 57992 # Simulator instruction rate (inst/s) +host_op_rate 105036 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 60491180 # Simulator tick rate (ticks/s) +host_mem_usage 236648 # Number of bytes of host memory used +host_seconds 0.09 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 54912 # Number of bytes read from this memory @@ -42,16 +42,18 @@ system.cpu.numWorkItemsStarted 0 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 5381 # Number of instructions committed system.cpu.committedOps 9748 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 9655 # Number of integer alu accesses +system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses system.cpu.num_func_calls 209 # number of times a function call or return occured system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls -system.cpu.num_int_insts 9655 # number of integer instructions +system.cpu.num_int_insts 9654 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 24822 # number of times the integer registers were read -system.cpu.num_int_register_writes 11063 # number of times the integer registers were written +system.cpu.num_int_register_reads 18335 # number of times the integer registers were read +system.cpu.num_int_register_writes 7527 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read +system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written system.cpu.num_mem_refs 1988 # number of memory refs system.cpu.num_load_insts 1053 # Number of load instructions system.cpu.num_store_insts 935 # Number of store instructions diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats index b58867c62..967016cd1 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats @@ -1,25 +1,10 @@ -Real time: Sep/22/2013 07:07:53 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 - -Virtual_time_in_seconds: 0.43 -Virtual_time_in_minutes: 0.00716667 -Virtual_time_in_hours: 0.000119444 -Virtual_time_in_days: 4.97685e-06 - Ruby_current_time: 121759 Ruby_start_time: 0 Ruby_cycles: 121759 -mbytes_resident: 80.4375 -mbytes_total: 139.961 -resident_ratio: 0.574714 - Busy Controller Counts: L1Cache-0:0 Directory-0:0 diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout index cb677e65b..78a38ee4d 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout -Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 06:21:20 -gem5 started Sep 22 2013 07:07:52 +gem5 compiled Oct 16 2013 01:35:57 +gem5 started Oct 16 2013 01:54:46 gem5 executing on zizzer command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt index 8372264a3..8e528df87 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000122 # Nu sim_ticks 121759 # Number of ticks simulated final_tick 121759 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 28174 # Simulator instruction rate (inst/s) -host_op_rate 51034 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 637400 # Simulator tick rate (ticks/s) -host_mem_usage 143324 # Number of bytes of host memory used -host_seconds 0.19 # Real time elapsed on the host +host_inst_rate 29550 # Simulator instruction rate (inst/s) +host_op_rate 53526 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 668523 # Simulator tick rate (ticks/s) +host_mem_usage 143652 # Number of bytes of host memory used +host_seconds 0.18 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits @@ -70,16 +70,18 @@ system.cpu.numWorkItemsStarted 0 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 5381 # Number of instructions committed system.cpu.committedOps 9748 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 9655 # Number of integer alu accesses +system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses system.cpu.num_func_calls 209 # number of times a function call or return occured system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls -system.cpu.num_int_insts 9655 # number of integer instructions +system.cpu.num_int_insts 9654 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 24822 # number of times the integer registers were read -system.cpu.num_int_register_writes 11063 # number of times the integer registers were written +system.cpu.num_int_register_reads 18335 # number of times the integer registers were read +system.cpu.num_int_register_writes 7527 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read +system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written system.cpu.num_mem_refs 1988 # number of memory refs system.cpu.num_load_insts 1053 # Number of load instructions system.cpu.num_store_insts 935 # Number of store instructions diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout index 628ef5965..c59dbb17e 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simout -Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 06:21:20 -gem5 started Sep 22 2013 06:48:05 +gem5 compiled Oct 16 2013 01:35:57 +gem5 started Oct 16 2013 01:41:56 gem5 executing on zizzer command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt index 0aa71b968..ff37d4bfb 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000028 # Nu sim_ticks 28358000 # Number of ticks simulated final_tick 28358000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 186481 # Simulator instruction rate (inst/s) -host_op_rate 337520 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 981039317 # Simulator tick rate (ticks/s) -host_mem_usage 241472 # Number of bytes of host memory used -host_seconds 0.03 # Real time elapsed on the host +host_inst_rate 41834 # Simulator instruction rate (inst/s) +host_op_rate 75775 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 220409714 # Simulator tick rate (ticks/s) +host_mem_usage 245252 # Number of bytes of host memory used +host_seconds 0.13 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 14528 # Number of bytes read from this memory @@ -50,16 +50,18 @@ system.cpu.numWorkItemsStarted 0 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 5381 # Number of instructions committed system.cpu.committedOps 9748 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 9655 # Number of integer alu accesses +system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses system.cpu.num_func_calls 209 # number of times a function call or return occured system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls -system.cpu.num_int_insts 9655 # number of integer instructions +system.cpu.num_int_insts 9654 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 24822 # number of times the integer registers were read -system.cpu.num_int_register_writes 11063 # number of times the integer registers were written +system.cpu.num_int_register_reads 18335 # number of times the integer registers were read +system.cpu.num_int_register_writes 7527 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read +system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written system.cpu.num_mem_refs 1988 # number of memory refs system.cpu.num_load_insts 1053 # Number of load instructions system.cpu.num_store_insts 935 # Number of store instructions |