diff options
Diffstat (limited to 'tests/quick/se/00.hello')
17 files changed, 351 insertions, 319 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini index 282a5a34c..57a963b50 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -78,7 +78,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello +executable=tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -121,9 +121,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -132,6 +132,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -189,6 +190,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.L1IcacheMemory @@ -234,6 +236,7 @@ tagArrayBanks=1 [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -358,6 +361,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats index 80d289974..b8ccc1417 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:45:14 +Real time: Sep/09/2012 13:38:15 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.54 -Virtual_time_in_minutes: 0.009 -Virtual_time_in_hours: 0.00015 -Virtual_time_in_days: 6.25e-06 +Virtual_time_in_seconds: 0.59 +Virtual_time_in_minutes: 0.00983333 +Virtual_time_in_hours: 0.000163889 +Virtual_time_in_days: 6.8287e-06 -Ruby_current_time: 231701 +Ruby_current_time: 113627 Ruby_start_time: 0 -Ruby_cycles: 231701 +Ruby_cycles: 113627 -mbytes_resident: 46.2734 -mbytes_total: 228.938 -resident_ratio: 0.20214 +mbytes_resident: 52.8594 +mbytes_total: 266.098 +resident_ratio: 0.198661 -ruby_cycles_executed: [ 231702 ] +ruby_cycles_executed: [ 113628 ] Busy Controller Counts: L1Cache-0:0 @@ -30,17 +30,17 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average: 1 | standard deviation: 0 | 0 8465 ] +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average: 1 | standard deviation: 0 | 0 8449 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 326 count: 8464 average: 26.3749 | standard deviation: 59.7716 | 0 7082 0 0 0 0 0 0 0 0 21 3 180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 7 156 141 316 165 138 16 4 6 35 30 41 24 40 3 1 2 4 3 0 2 2 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 3 0 0 0 0 0 0 0 1 0 0 1 20 0 3 2 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 2 max: 326 count: 1185 average: 65.011 | standard deviation: 81.2899 | 0 660 0 0 0 0 0 0 0 0 3 2 95 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 55 33 124 68 56 0 2 3 11 11 7 12 19 3 1 1 3 2 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 2 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 321 count: 865 average: 39.3988 | standard deviation: 76.4664 | 0 654 0 0 0 0 0 0 0 0 17 0 26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 17 11 29 14 36 1 0 1 1 6 23 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 18 0 2 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 2 max: 276 count: 6414 average: 17.4804 | standard deviation: 48.2606 | 0 5768 0 0 0 0 0 0 0 0 1 1 59 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 3 84 97 163 83 46 15 2 2 23 13 11 12 20 0 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_L1Cache: [binsize: 1 max: 2 count: 7082 average: 2 | standard deviation: 0 | 0 0 7082 ] -miss_latency_L2Cache: [binsize: 1 max: 25 count: 204 average: 24.5441 | standard deviation: 1.24963 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21 2 1 1 179 ] -miss_latency_Directory: [binsize: 2 max: 326 count: 1178 average: 173.231 | standard deviation: 22.9712 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 7 156 141 316 165 138 16 4 6 35 30 41 24 40 3 1 2 4 3 0 2 2 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 3 0 0 0 0 0 0 0 1 0 0 1 20 0 3 2 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 1 max: 122 count: 8448 average: 12.4502 | standard deviation: 24.781 | 0 0 7066 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 1 1 2 181 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 3 1 776 93 43 166 13 3 9 0 0 2 1 0 1 0 0 1 0 1 1 1 0 0 0 0 3 0 0 1 0 0 5 0 0 0 1 0 0 0 0 1 0 0 25 0 0 2 0 0 1 0 0 1 ] +miss_latency_LD: [binsize: 1 max: 113 count: 1183 average: 29.3643 | standard deviation: 33.3419 | 0 0 658 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 1 1 95 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 0 0 298 27 9 57 5 0 4 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 3 0 0 0 0 0 3 0 0 0 1 0 0 0 0 1 0 0 6 ] +miss_latency_ST: [binsize: 1 max: 122 count: 865 average: 17.7642 | standard deviation: 30.4859 | 0 0 654 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 0 0 0 26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 93 8 1 36 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 0 0 2 0 0 1 0 0 1 ] +miss_latency_IFETCH: [binsize: 1 max: 101 count: 6400 average: 8.60547 | standard deviation: 20.2068 | 0 0 5754 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 3 1 385 58 33 73 8 3 3 0 0 1 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 2 ] +miss_latency_L1Cache: [binsize: 1 max: 2 count: 7066 average: 2 | standard deviation: 0 | 0 0 7066 ] +miss_latency_L2Cache: [binsize: 1 max: 25 count: 204 average: 24.5931 | standard deviation: 1.18696 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 1 1 2 181 ] +miss_latency_Directory: [binsize: 1 max: 122 count: 1178 average: 73.0306 | standard deviation: 7.25919 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 3 1 776 93 43 166 13 3 9 0 0 2 1 0 1 0 0 1 0 1 1 1 0 0 0 0 3 0 0 1 0 0 5 0 0 0 1 0 0 0 0 1 0 0 25 0 0 2 0 0 1 0 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -49,17 +49,17 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 169 count: 1 average: 169 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 70 count: 1 average: 70 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 1177 -miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 660 average: 2 | standard deviation: 0 | 0 0 660 ] -miss_latency_LD_L2Cache: [binsize: 1 max: 25 count: 100 average: 24.83 | standard deviation: 0.771984 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 1 1 0 95 ] -miss_latency_LD_Directory: [binsize: 2 max: 326 count: 425 average: 172.318 | standard deviation: 18.6969 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 55 33 124 68 56 0 2 3 11 11 7 12 19 3 1 1 3 2 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 2 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 658 average: 2 | standard deviation: 0 | 0 0 658 ] +miss_latency_LD_L2Cache: [binsize: 1 max: 25 count: 100 average: 24.86 | standard deviation: 0.6742 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 1 1 95 ] +miss_latency_LD_Directory: [binsize: 1 max: 113 count: 425 average: 72.7906 | standard deviation: 6.46854 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 0 0 298 27 9 57 5 0 4 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 3 0 0 0 0 0 3 0 0 0 1 0 0 0 0 1 0 0 6 ] miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 654 average: 2 | standard deviation: 0 | 0 0 654 ] miss_latency_ST_L2Cache: [binsize: 1 max: 25 count: 43 average: 23.4186 | standard deviation: 1.98206 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 0 0 0 26 ] -miss_latency_ST_Directory: [binsize: 2 max: 321 count: 168 average: 189.077 | standard deviation: 46.5714 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 17 11 29 14 36 1 0 1 1 6 23 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 18 0 2 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 5768 average: 2 | standard deviation: 0 | 0 0 5768 ] -miss_latency_IFETCH_L2Cache: [binsize: 1 max: 25 count: 61 average: 24.8689 | standard deviation: 0.645497 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 58 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 276 count: 585 average: 169.344 | standard deviation: 10.0739 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 3 84 97 163 83 46 15 2 2 23 13 11 12 20 0 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 1 max: 122 count: 168 average: 77.6845 | standard deviation: 14.6277 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 93 8 1 36 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 0 0 2 0 0 1 0 0 1 ] +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 5754 average: 2 | standard deviation: 0 | 0 0 5754 ] +miss_latency_IFETCH_L2Cache: [binsize: 1 max: 25 count: 61 average: 24.9836 | standard deviation: 0.129099 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 60 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 101 count: 585 average: 71.8684 | standard deviation: 2.64866 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 3 1 385 58 33 73 8 3 3 0 0 1 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 2 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -91,11 +91,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 12976 +page_reclaims: 10608 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 112 Network Stats ------------- @@ -106,32 +106,28 @@ total_msg_count_ResponseL2hit_Data: 612 44064 total_msg_count_Response_Control: 3 24 total_msg_count_Writeback_Data: 4749 341928 total_msg_count_Writeback_Control: 2901 23208 -total_msg_count_Persistent_Control: 240 1920 -total_msgs: 19770 total_bytes: 727440 +total_msgs: 19530 total_bytes: 725520 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.81473 - links_utilized_percent_switch_0_link_0: 2.69291 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.93654 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 5.72201 + links_utilized_percent_switch_0_link_0: 5.47361 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 5.97041 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 1178 84816 [ 0 0 0 0 1178 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 204 14688 [ 0 0 0 0 204 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Request_Control: 1382 11056 [ 0 1382 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_1_Writeback_Data: 1354 97488 [ 0 0 0 0 1354 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.12213 - links_utilized_percent_switch_1_link_0: 2.93654 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 1.30772 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 4.31852 + links_utilized_percent_switch_1_link_0: 5.97041 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 2.66662 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Request_Control: 1382 11056 [ 0 1382 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Writeback_Data: 1354 97488 [ 0 0 0 0 1354 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Request_Control: 1195 9560 [ 0 0 1195 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 204 14688 [ 0 0 0 0 204 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 @@ -140,33 +136,30 @@ links_utilized_percent_switch_1: 2.12213 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.6039 - links_utilized_percent_switch_2_link_0: 0.919936 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.28786 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 3.26177 + links_utilized_percent_switch_2_link_0: 1.85827 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 4.66526 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Request_Control: 1195 9560 [ 0 0 1195 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Data: 229 16488 [ 0 0 0 0 229 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 967 7736 [ 0 0 0 0 967 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Response_Data: 1178 84816 [ 0 0 0 0 1178 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 2.18025 - links_utilized_percent_switch_3_link_0: 2.68428 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 2.93654 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0.919936 bw: 16000 base_latency: 1 +links_utilized_percent_switch_3: 4.4341 + links_utilized_percent_switch_3_link_0: 5.47361 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 5.97041 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 1.85827 bw: 16000 base_latency: 1 outgoing_messages_switch_3_link_0_Response_Data: 1178 84816 [ 0 0 0 0 1178 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 204 14688 [ 0 0 0 0 204 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Request_Control: 1382 11056 [ 0 1382 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_1_Writeback_Data: 1354 97488 [ 0 0 0 0 1354 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Request_Control: 1195 9560 [ 0 0 1195 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Writeback_Data: 229 16488 [ 0 0 0 0 229 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Writeback_Control: 967 7736 [ 0 0 0 0 967 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Persistent_Control: 40 320 [ 0 0 0 40 0 0 0 0 0 0 ] base_latency: 1 Cache Stats: system.l1_cntrl0.L1IcacheMemory system.l1_cntrl0.L1IcacheMemory_total_misses: 646 @@ -193,8 +186,8 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory --- L1Cache --- - Event Counts - -Load [1185 ] 1185 -Ifetch [6414 ] 6414 +Load [1183 ] 1183 +Ifetch [6400 ] 6400 Store [865 ] 865 Atomic [0 ] 0 L1_Replacement [1364 ] 1364 @@ -212,8 +205,8 @@ Transient_Local_GETS_Last_Token [0 ] 0 Persistent_GETX [0 ] 0 Persistent_GETS [0 ] 0 Persistent_GETS_Last_Token [0 ] 0 -Own_Lock_or_Unlock [40 ] 40 -Request_Timeout [20 ] 20 +Own_Lock_or_Unlock [0 ] 0 +Request_Timeout [0 ] 0 Use_TimeoutStarverX [0 ] 0 Use_TimeoutStarverS [0 ] 0 Use_TimeoutNoStarvers [1220 ] 1220 @@ -297,8 +290,8 @@ O Persistent_GETS [0 ] 0 O Persistent_GETS_Last_Token [0 ] 0 O Own_Lock_or_Unlock [0 ] 0 -M Load [186 ] 186 -M Ifetch [3322 ] 3322 +M Load [184 ] 184 +M Ifetch [3308 ] 3308 M Store [33 ] 33 M Atomic [0 ] 0 M L1_Replacement [945 ] 945 @@ -308,7 +301,7 @@ M Transient_GETS [0 ] 0 M Transient_Local_GETS [0 ] 0 M Persistent_GETX [0 ] 0 M Persistent_GETS [0 ] 0 -M Own_Lock_or_Unlock [3 ] 3 +M Own_Lock_or_Unlock [0 ] 0 MM Load [220 ] 220 MM Ifetch [0 ] 0 @@ -321,7 +314,7 @@ MM Transient_GETS [0 ] 0 MM Transient_Local_GETS [0 ] 0 MM Persistent_GETX [0 ] 0 MM Persistent_GETS [0 ] 0 -MM Own_Lock_or_Unlock [17 ] 17 +MM Own_Lock_or_Unlock [0 ] 0 M_W Load [80 ] 80 M_W Ifetch [2115 ] 2115 @@ -375,8 +368,8 @@ IM Transient_Local_GETS_Last_Token [0 ] 0 IM Persistent_GETX [0 ] 0 IM Persistent_GETS [0 ] 0 IM Persistent_GETS_Last_Token [0 ] 0 -IM Own_Lock_or_Unlock [17 ] 17 -IM Request_Timeout [17 ] 17 +IM Own_Lock_or_Unlock [0 ] 0 +IM Request_Timeout [0 ] 0 SM Load [0 ] 0 SM Ifetch [0 ] 0 @@ -438,8 +431,8 @@ IS Transient_Local_GETS_Last_Token [0 ] 0 IS Persistent_GETX [0 ] 0 IS Persistent_GETS [0 ] 0 IS Persistent_GETS_Last_Token [0 ] 0 -IS Own_Lock_or_Unlock [3 ] 3 -IS Request_Timeout [3 ] 3 +IS Own_Lock_or_Unlock [0 ] 0 +IS Request_Timeout [0 ] 0 I_L Load [0 ] 0 I_L Ifetch [0 ] 0 @@ -573,10 +566,10 @@ Data_Owner [0 ] 0 Data_All_Tokens [0 ] 0 Ack [0 ] 0 Ack_All_Tokens [0 ] 0 -Persistent_GETX [17 ] 17 -Persistent_GETS [3 ] 3 +Persistent_GETX [0 ] 0 +Persistent_GETS [0 ] 0 Persistent_GETS_Last_Token [0 ] 0 -Own_Lock_or_Unlock [20 ] 20 +Own_Lock_or_Unlock [0 ] 0 - Transitions - NP L1_GETS [1010 ] 1010 @@ -595,7 +588,7 @@ NP Ack [0 ] 0 NP Persistent_GETX [0 ] 0 NP Persistent_GETS [0 ] 0 NP Persistent_GETS_Last_Token [0 ] 0 -NP Own_Lock_or_Unlock [20 ] 20 +NP Own_Lock_or_Unlock [0 ] 0 I L1_GETS [0 ] 0 I L1_GETS_Last_Token [0 ] 0 @@ -684,8 +677,8 @@ I_L Data_Shared [0 ] 0 I_L Data_Owner [0 ] 0 I_L Data_All_Tokens [0 ] 0 I_L Ack [0 ] 0 -I_L Persistent_GETX [17 ] 17 -I_L Persistent_GETS [3 ] 3 +I_L Persistent_GETX [0 ] 0 +I_L Persistent_GETS [0 ] 0 I_L Own_Lock_or_Unlock [0 ] 0 S_L L1_GETS [0 ] 0 @@ -713,28 +706,28 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 1407 memory_reads: 1178 memory_writes: 229 - memory_refreshes: 483 - memory_total_request_delays: 396 - memory_delays_per_request: 0.28145 - memory_delays_in_input_queue: 112 + memory_refreshes: 789 + memory_total_request_delays: 323 + memory_delays_per_request: 0.229566 + memory_delays_in_input_queue: 0 memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 284 - memory_stalls_for_bank_busy: 58 + memory_delays_stalled_at_head_of_bank_queue: 323 + memory_stalls_for_bank_busy: 81 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 16 - memory_stalls_for_bus: 208 + memory_stalls_for_arbitration: 19 + memory_stalls_for_bus: 213 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 2 + memory_stalls_for_read_write_turnaround: 10 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 75 17 45 41 54 102 33 16 20 22 32 34 53 50 40 31 40 21 21 21 28 38 89 22 31 23 32 72 95 141 15 53 --- Directory --- - Event Counts - -GETX [488 ] 488 -GETS [1093 ] 1093 -Lockdown [20 ] 20 -Unlockdown [20 ] 20 +GETX [278 ] 278 +GETS [1034 ] 1034 +Lockdown [0 ] 0 +Unlockdown [0 ] 0 Own_Lock_or_Unlock [0 ] 0 Own_Lock_or_Unlock_Tokens [0 ] 0 Data_Owner [9 ] 9 @@ -767,7 +760,7 @@ O DMA_WRITE_All_Tokens [0 ] 0 NO GETX [17 ] 17 NO GETS [0 ] 0 -NO Lockdown [6 ] 6 +NO Lockdown [0 ] 0 NO Unlockdown [0 ] 0 NO Own_Lock_or_Unlock [0 ] 0 NO Own_Lock_or_Unlock_Tokens [0 ] 0 @@ -782,7 +775,7 @@ NO DMA_WRITE [0 ] 0 L GETX [0 ] 0 L GETS [0 ] 0 L Lockdown [0 ] 0 -L Unlockdown [20 ] 20 +L Unlockdown [0 ] 0 L Own_Lock_or_Unlock [0 ] 0 L Own_Lock_or_Unlock_Tokens [0 ] 0 L Data_Owner [0 ] 0 @@ -794,8 +787,8 @@ L DMA_READ [0 ] 0 L DMA_WRITE [0 ] 0 L DMA_WRITE_All_Tokens [0 ] 0 -O_W GETX [303 ] 303 -O_W GETS [83 ] 83 +O_W GETX [93 ] 93 +O_W GETS [24 ] 24 O_W Lockdown [0 ] 0 O_W Unlockdown [0 ] 0 O_W Own_Lock_or_Unlock [0 ] 0 @@ -839,7 +832,7 @@ L_NO_W Data_All_Tokens [0 ] 0 L_NO_W Ack_Owner [0 ] 0 L_NO_W Tokens [0 ] 0 L_NO_W Ack_All_Tokens [0 ] 0 -L_NO_W Memory_Data [14 ] 14 +L_NO_W Memory_Data [0 ] 0 L_NO_W DMA_READ [0 ] 0 L_NO_W DMA_WRITE [0 ] 0 L_NO_W DMA_WRITE_All_Tokens [0 ] 0 @@ -880,7 +873,7 @@ DW_L_W DMA_WRITE_All_Tokens [0 ] 0 NO_W GETX [0 ] 0 NO_W GETS [0 ] 0 -NO_W Lockdown [14 ] 14 +NO_W Lockdown [0 ] 0 NO_W Unlockdown [0 ] 0 NO_W Own_Lock_or_Unlock [0 ] 0 NO_W Own_Lock_or_Unlock_Tokens [0 ] 0 @@ -889,7 +882,7 @@ NO_W Data_All_Tokens [0 ] 0 NO_W Ack_Owner [0 ] 0 NO_W Tokens [0 ] 0 NO_W Ack_All_Tokens [0 ] 0 -NO_W Memory_Data [1164 ] 1164 +NO_W Memory_Data [1178 ] 1178 NO_W DMA_READ [0 ] 0 NO_W DMA_WRITE [0 ] 0 NO_W DMA_WRITE_All_Tokens [0 ] 0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout index 4a97d59dd..c5809ae71 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout +Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 16:58:46 -gem5 started Aug 13 2012 18:10:55 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:38:07 +gem5 started Sep 9 2012 13:38:15 +gem5 executing on ribera.cs.wisc.edu command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 231701 because target called exit() +Exiting @ tick 113627 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini index 67c1afdb1..c24d0aba6 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -78,7 +78,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello +executable=tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 @@ -121,9 +121,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -132,6 +132,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -189,6 +190,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.L1IcacheMemory @@ -234,6 +236,7 @@ tagArrayBanks=1 [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -358,6 +361,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats index 706303b60..0cd5b5b0f 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:45:47 +Real time: Sep/09/2012 13:38:15 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.42 -Virtual_time_in_minutes: 0.007 -Virtual_time_in_hours: 0.000116667 -Virtual_time_in_days: 4.86111e-06 +Virtual_time_in_seconds: 0.43 +Virtual_time_in_minutes: 0.00716667 +Virtual_time_in_hours: 0.000119444 +Virtual_time_in_days: 4.97685e-06 -Ruby_current_time: 87899 +Ruby_current_time: 43073 Ruby_start_time: 0 -Ruby_cycles: 87899 +Ruby_cycles: 43073 -mbytes_resident: 44.4727 -mbytes_total: 227.578 -resident_ratio: 0.195434 +mbytes_resident: 51.0586 +mbytes_total: 264.82 +resident_ratio: 0.192819 -ruby_cycles_executed: [ 87900 ] +ruby_cycles_executed: [ 43074 ] Busy Controller Counts: L1Cache-0:0 @@ -34,13 +34,13 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 307 count: 3294 average: 25.6846 | standard deviation: 58.8214 | 0 2776 0 0 0 0 0 0 0 0 6 2 62 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 4 58 48 98 72 79 0 1 2 13 9 10 7 26 0 1 0 0 1 1 0 1 1 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 2 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 2 max: 307 count: 415 average: 65.2795 | standard deviation: 81.9739 | 0 233 0 0 0 0 0 0 0 0 0 1 32 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 16 14 37 32 18 0 0 0 9 2 2 2 8 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 307 count: 294 average: 34.5782 | standard deviation: 69.4748 | 0 228 0 0 0 0 0 0 0 0 6 1 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 15 8 5 0 0 0 0 1 1 0 5 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 2 max: 277 count: 2585 average: 18.3164 | standard deviation: 49.7019 | 0 2315 0 0 0 0 0 0 0 0 0 0 23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 36 29 46 32 56 0 1 2 4 6 7 5 13 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 1 max: 113 count: 3294 average: 12.0762 | standard deviation: 24.317 | 0 0 2776 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 2 0 62 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 2 1 300 33 9 62 5 0 7 3 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 2 0 0 0 0 0 6 ] +miss_latency_LD: [binsize: 1 max: 113 count: 415 average: 29.3398 | standard deviation: 33.6061 | 0 0 233 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 32 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 99 14 1 18 2 0 4 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 3 ] +miss_latency_ST: [binsize: 1 max: 113 count: 294 average: 15.6905 | standard deviation: 27.6304 | 0 0 228 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 1 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 1 0 32 2 0 8 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 ] +miss_latency_IFETCH: [binsize: 1 max: 101 count: 2585 average: 8.89362 | standard deviation: 20.6535 | 0 0 2315 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 1 1 169 17 8 36 3 0 2 2 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ] miss_latency_L1Cache: [binsize: 1 max: 2 count: 2776 average: 2 | standard deviation: 0 | 0 0 2776 ] miss_latency_L2Cache: [binsize: 1 max: 25 count: 70 average: 24.6 | standard deviation: 1.16096 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 2 0 62 ] -miss_latency_Directory: [binsize: 2 max: 307 count: 448 average: 172.614 | standard deviation: 19.1957 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 4 58 48 98 72 79 0 1 2 13 9 10 7 26 0 1 0 0 1 1 0 1 1 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 2 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_Directory: [binsize: 1 max: 113 count: 448 average: 72.5558 | standard deviation: 5.90738 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 2 1 300 33 9 62 5 0 7 3 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 2 0 0 0 0 0 6 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -49,17 +49,17 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 169 count: 1 average: 169 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 70 count: 1 average: 70 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 447 miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 233 average: 2 | standard deviation: 0 | 0 0 233 ] miss_latency_LD_L2Cache: [binsize: 1 max: 25 count: 33 average: 24.9394 | standard deviation: 0.353553 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 32 ] -miss_latency_LD_Directory: [binsize: 2 max: 307 count: 149 average: 173.168 | standard deviation: 20.2876 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 16 14 37 32 18 0 0 0 9 2 2 2 8 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_Directory: [binsize: 1 max: 113 count: 149 average: 73.0671 | standard deviation: 7.2866 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 99 14 1 18 2 0 4 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 3 ] miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 228 average: 2 | standard deviation: 0 | 0 0 228 ] miss_latency_ST_L2Cache: [binsize: 1 max: 25 count: 14 average: 23.1429 | standard deviation: 2 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 1 0 7 ] -miss_latency_ST_Directory: [binsize: 2 max: 307 count: 52 average: 180.5 | standard deviation: 35.1816 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 15 8 5 0 0 0 0 1 1 0 5 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 1 max: 113 count: 52 average: 73.7115 | standard deviation: 9.96956 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 1 0 32 2 0 8 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 ] miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 2315 average: 2 | standard deviation: 0 | 0 0 2315 ] miss_latency_IFETCH_L2Cache: [binsize: 1 max: 25 count: 23 average: 25 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 277 count: 247 average: 170.619 | standard deviation: 12.1654 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 36 29 46 32 56 0 1 2 4 6 7 5 13 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 101 count: 247 average: 72.004 | standard deviation: 3.18086 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 1 1 169 17 8 36 3 0 2 2 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -91,11 +91,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 12519 +page_reclaims: 10155 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- @@ -110,9 +110,9 @@ total_msgs: 7326 total_bytes: 270576 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.75856 - links_utilized_percent_switch_0_link_0: 2.65248 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.86465 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 5.6294 + links_utilized_percent_switch_0_link_0: 5.4129 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 5.84589 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 448 32256 [ 0 0 0 0 448 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 70 5040 [ 0 0 0 0 70 0 0 0 0 0 ] base_latency: 1 @@ -122,9 +122,9 @@ links_utilized_percent_switch_0: 2.75856 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.05975 - links_utilized_percent_switch_1_link_0: 2.86465 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 1.25485 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 4.20333 + links_utilized_percent_switch_1_link_0: 5.84589 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 2.56077 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Request_Control: 518 4144 [ 0 518 0 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Writeback_Data: 502 36144 [ 0 0 0 0 502 0 0 0 0 0 ] base_latency: 1 @@ -136,9 +136,9 @@ links_utilized_percent_switch_1: 2.05975 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.59473 - links_utilized_percent_switch_2_link_0: 0.895915 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.29354 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 3.25436 + links_utilized_percent_switch_2_link_0: 1.82829 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 4.68043 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Request_Control: 454 3632 [ 0 0 454 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Data: 84 6048 [ 0 0 0 0 84 0 0 0 0 0 ] base_latency: 1 @@ -147,10 +147,10 @@ links_utilized_percent_switch_2: 1.59473 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 2.13768 - links_utilized_percent_switch_3_link_0: 2.65248 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 2.86465 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0.895915 bw: 16000 base_latency: 1 +links_utilized_percent_switch_3: 4.36236 + links_utilized_percent_switch_3_link_0: 5.4129 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 5.84589 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 1.82829 bw: 16000 base_latency: 1 outgoing_messages_switch_3_link_0_Response_Data: 448 32256 [ 0 0 0 0 448 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 70 5040 [ 0 0 0 0 70 0 0 0 0 0 ] base_latency: 1 @@ -706,26 +706,26 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 532 memory_reads: 448 memory_writes: 84 - memory_refreshes: 184 - memory_total_request_delays: 169 - memory_delays_per_request: 0.317669 - memory_delays_in_input_queue: 45 + memory_refreshes: 299 + memory_total_request_delays: 150 + memory_delays_per_request: 0.281955 + memory_delays_in_input_queue: 0 memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 124 - memory_stalls_for_bank_busy: 31 + memory_delays_stalled_at_head_of_bank_queue: 150 + memory_stalls_for_bank_busy: 38 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 10 - memory_stalls_for_bus: 81 + memory_stalls_for_arbitration: 16 + memory_stalls_for_bus: 90 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 2 + memory_stalls_for_read_write_turnaround: 6 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 19 10 0 39 20 19 31 22 5 3 6 4 22 41 22 3 4 6 7 13 10 18 14 42 16 5 5 12 13 18 14 69 --- Directory --- - Event Counts - -GETX [107 ] 107 -GETS [441 ] 441 +GETX [70 ] 70 +GETS [405 ] 405 Lockdown [0 ] 0 Unlockdown [0 ] 0 Own_Lock_or_Unlock [0 ] 0 @@ -787,8 +787,8 @@ L DMA_READ [0 ] 0 L DMA_WRITE [0 ] 0 L DMA_WRITE_All_Tokens [0 ] 0 -O_W GETX [49 ] 49 -O_W GETS [45 ] 45 +O_W GETX [12 ] 12 +O_W GETS [9 ] 9 O_W Lockdown [0 ] 0 O_W Unlockdown [0 ] 0 O_W Own_Lock_or_Unlock [0 ] 0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout index 8d3438c6c..f8e247e3b 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout +Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 28 2012 11:35:39 -gem5 started Jul 28 2012 11:36:00 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:38:07 +gem5 started Sep 9 2012 13:38:15 +gem5 executing on ribera.cs.wisc.edu command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 87899 because target called exit() +Exiting @ tick 43073 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini index 8a1b6c5da..fc347ac18 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -78,7 +78,7 @@ egid=100 env= errout=cerr euid=100 -executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/alpha/tru64/hello +executable=tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 @@ -118,9 +118,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -129,6 +129,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -165,6 +166,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.cacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.cacheMemory @@ -180,6 +182,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -281,6 +284,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats index 6aef3cd8e..d2ee4991b 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:25:18 +Real time: Sep/09/2012 13:26:05 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.41 -Virtual_time_in_minutes: 0.00683333 -Virtual_time_in_hours: 0.000113889 -Virtual_time_in_days: 4.74537e-06 +Virtual_time_in_seconds: 0.39 +Virtual_time_in_minutes: 0.0065 +Virtual_time_in_hours: 0.000108333 +Virtual_time_in_days: 4.51389e-06 -Ruby_current_time: 123378 +Ruby_current_time: 52498 Ruby_start_time: 0 -Ruby_cycles: 123378 +Ruby_cycles: 52498 -mbytes_resident: 44.5195 -mbytes_total: 227.34 -resident_ratio: 0.195845 +mbytes_resident: 53.1406 +mbytes_total: 264.43 +resident_ratio: 0.200978 -ruby_cycles_executed: [ 123379 ] +ruby_cycles_executed: [ 52499 ] Busy Controller Counts: L1Cache-0:0 @@ -33,12 +33,12 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 375 count: 3294 average: 36.4554 | standard deviation: 69.7725 | 0 2668 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 0 0 0 3 1 1 4 2 101 88 63 177 126 0 1 1 8 0 2 1 1 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 4 5 13 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 2 max: 281 count: 415 average: 107.304 | standard deviation: 88.8453 | 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 2 0 56 24 27 75 32 0 0 1 3 0 1 0 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 4 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 265 count: 294 average: 53.2585 | standard deviation: 80.456 | 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 14 11 7 31 12 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_IFETCH: [binsize: 2 max: 375 count: 2585 average: 23.1702 | standard deviation: 56.4841 | 0 2288 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 0 0 2 2 31 53 29 71 82 0 1 0 5 0 1 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1 3 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency: [binsize: 1 max: 94 count: 3294 average: 14.9375 | standard deviation: 24.8042 | 0 0 0 2668 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 4 7 128 221 203 1 2 1 2 7 11 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 4 18 11 0 1 ] +miss_latency_LD: [binsize: 1 max: 92 count: 415 average: 40.3325 | standard deviation: 31.5967 | 0 0 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 4 44 94 74 0 2 0 1 2 5 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 9 6 ] +miss_latency_ST: [binsize: 1 max: 92 count: 294 average: 20.9456 | standard deviation: 28.6341 | 0 0 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 16 31 29 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 ] +miss_latency_IFETCH: [binsize: 1 max: 94 count: 2585 average: 10.1772 | standard deviation: 20.0197 | 0 0 0 2288 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 4 3 68 96 100 1 0 0 1 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 4 0 1 ] miss_latency_L1Cache: [binsize: 1 max: 3 count: 2668 average: 3 | standard deviation: 0 | 0 0 0 2668 ] -miss_latency_Directory: [binsize: 2 max: 375 count: 626 average: 179.042 | standard deviation: 22.5462 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 0 0 0 3 1 1 4 2 101 88 63 177 126 0 1 1 8 0 2 1 1 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 4 5 13 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ] +miss_latency_Directory: [binsize: 1 max: 94 count: 626 average: 65.8147 | standard deviation: 6.37759 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 4 7 128 221 203 1 2 1 2 7 11 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 4 18 11 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -47,14 +47,14 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average: 61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 625 miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 170 average: 3 | standard deviation: 0 | 0 0 0 170 ] -miss_latency_LD_Directory: [binsize: 2 max: 281 count: 245 average: 179.678 | standard deviation: 23.5327 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 2 0 56 24 27 75 32 0 0 1 3 0 1 0 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 4 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_Directory: [binsize: 1 max: 92 count: 245 average: 66.2367 | standard deviation: 7.0079 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 4 44 94 74 0 2 0 1 2 5 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 9 6 ] miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 210 average: 3 | standard deviation: 0 | 0 0 0 210 ] -miss_latency_ST_Directory: [binsize: 2 max: 265 count: 84 average: 178.905 | standard deviation: 21.977 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 14 11 7 31 12 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 1 max: 92 count: 84 average: 65.8095 | standard deviation: 6.52244 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 16 31 29 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 ] miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 2288 average: 3 | standard deviation: 0 | 0 0 0 2288 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 375 count: 297 average: 178.556 | standard deviation: 21.9279 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 0 0 2 2 31 53 29 71 82 0 1 0 5 0 1 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1 3 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 94 count: 297 average: 65.468 | standard deviation: 5.76218 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 4 3 68 96 100 1 0 0 1 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 4 0 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -86,11 +86,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 12524 +page_reclaims: 10146 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- @@ -103,9 +103,9 @@ total_msgs: 7488 total_bytes: 299520 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.52881 - links_utilized_percent_switch_0_link_0: 2.5353 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.52233 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 5.94308 + links_utilized_percent_switch_0_link_0: 5.95832 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 5.92784 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1 @@ -114,9 +114,9 @@ links_utilized_percent_switch_0: 2.52881 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.52881 - links_utilized_percent_switch_1_link_0: 2.52233 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.5353 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 5.94308 + links_utilized_percent_switch_1_link_0: 5.92784 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 5.95832 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1 @@ -125,9 +125,9 @@ links_utilized_percent_switch_1: 2.52881 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 2.52881 - links_utilized_percent_switch_2_link_0: 2.5353 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.52233 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 5.94308 + links_utilized_percent_switch_2_link_0: 5.95832 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 5.92784 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1 @@ -190,19 +190,19 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 1248 memory_reads: 626 memory_writes: 622 - memory_refreshes: 258 - memory_total_request_delays: 1502 - memory_delays_per_request: 1.20353 - memory_delays_in_input_queue: 414 - memory_delays_behind_head_of_bank_queue: 3 - memory_delays_stalled_at_head_of_bank_queue: 1085 - memory_stalls_for_bank_busy: 404 + memory_refreshes: 365 + memory_total_request_delays: 915 + memory_delays_per_request: 0.733173 + memory_delays_in_input_queue: 0 + memory_delays_behind_head_of_bank_queue: 0 + memory_delays_stalled_at_head_of_bank_queue: 915 + memory_stalls_for_bank_busy: 352 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 39 - memory_stalls_for_bus: 620 + memory_stalls_for_arbitration: 40 + memory_stalls_for_bus: 497 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 22 + memory_stalls_for_read_write_turnaround: 26 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 55 40 0 100 42 42 88 45 14 10 14 10 46 82 38 6 22 14 14 48 20 52 26 92 34 10 12 24 28 44 38 138 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout index da5889aa4..71b6a1fe1 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby/simout +Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 10 2012 16:32:12 -gem5 started Jul 10 2012 17:25:18 -gem5 executing on sc2b0605 +gem5 compiled Sep 9 2012 13:25:55 +gem5 started Sep 9 2012 13:26:05 +gem5 executing on ribera.cs.wisc.edu command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 123378 because target called exit() +Exiting @ tick 52498 because target called exit() diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini index 42e36b24c..6ebb273d9 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -78,7 +78,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello +executable=tests/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -118,9 +118,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -129,6 +129,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -165,6 +166,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.cacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.cacheMemory @@ -180,6 +182,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -281,6 +284,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout index 7d7a57a70..df094012d 100755 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simout +Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 17:00:38 -gem5 started Aug 13 2012 18:12:12 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:41:09 +gem5 started Sep 9 2012 13:41:16 +gem5 executing on ribera.cs.wisc.edu command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby -re tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello World! -Exiting @ tick 292960 because target called exit() +Exiting @ tick 125334 because target called exit() diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini index 631d050da..de3d8b56f 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -78,7 +78,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello +executable=tests/test-progs/hello/bin/sparc/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -118,9 +118,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -129,6 +129,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -165,6 +166,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.cacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.cacheMemory @@ -180,6 +182,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -281,6 +284,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats index 1972ae394..b9367ba4b 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:57:35 +Real time: Sep/09/2012 13:47:33 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.48 -Virtual_time_in_minutes: 0.008 -Virtual_time_in_hours: 0.000133333 -Virtual_time_in_days: 5.55556e-06 +Virtual_time_in_seconds: 0.42 +Virtual_time_in_minutes: 0.007 +Virtual_time_in_hours: 0.000116667 +Virtual_time_in_days: 4.86111e-06 -Ruby_current_time: 253364 +Ruby_current_time: 107952 Ruby_start_time: 0 -Ruby_cycles: 253364 +Ruby_cycles: 107952 -mbytes_resident: 47.7148 -mbytes_total: 237.852 -resident_ratio: 0.200624 +mbytes_resident: 54.2266 +mbytes_total: 273.301 +resident_ratio: 0.198428 -ruby_cycles_executed: [ 253365 ] +ruby_cycles_executed: [ 107953 ] Busy Controller Counts: L1Cache-0:0 @@ -29,16 +29,16 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 1 count: 6773 average: 1 | standard deviation: 0 | 0 6773 ] +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 6759 average: 1 | standard deviation: 0 | 0 6759 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 371 count: 6772 average: 36.4135 | standard deviation: 69.5949 | 0 5483 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 4 2 2 10 2 309 224 133 323 144 9 3 1 0 0 11 11 1 16 4 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 25 14 6 15 3 1 1 1 0 0 1 1 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_LD: [binsize: 2 max: 285 count: 716 average: 98.7235 | standard deviation: 87.4535 | 0 321 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 3 0 110 62 31 116 36 4 1 0 0 0 1 0 1 6 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 2 2 3 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 371 count: 673 average: 50.584 | standard deviation: 80.4924 | 0 494 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 27 44 26 39 17 2 1 0 0 0 2 2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 9 0 2 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH: [binsize: 2 max: 285 count: 5383 average: 26.3539 | standard deviation: 60.2129 | 0 4668 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 5 2 172 118 76 168 91 3 1 1 0 0 8 9 0 10 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 18 3 4 10 1 0 0 1 0 0 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_L1Cache: [binsize: 1 max: 3 count: 5483 average: 3 | standard deviation: 0 | 0 0 0 5483 ] -miss_latency_Directory: [binsize: 2 max: 371 count: 1289 average: 178.544 | standard deviation: 22.1923 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 4 2 2 10 2 309 224 133 323 144 9 3 1 0 0 11 11 1 16 4 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 25 14 6 15 3 1 1 1 0 0 1 1 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency: [binsize: 1 max: 125 count: 6758 average: 14.974 | standard deviation: 24.8304 | 0 0 0 5469 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 9 10 284 430 440 7 1 3 10 10 11 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 5 23 35 1 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD: [binsize: 1 max: 93 count: 715 average: 37.3343 | standard deviation: 31.1717 | 0 0 0 320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 6 4 94 137 128 1 0 0 4 1 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 9 1 ] +miss_latency_ST: [binsize: 1 max: 125 count: 673 average: 20.0223 | standard deviation: 28.6826 | 0 0 0 494 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 43 50 63 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 4 8 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH: [binsize: 1 max: 98 count: 5370 average: 11.3641 | standard deviation: 21.4696 | 0 0 0 4655 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 2 5 147 243 249 5 1 2 5 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 3 16 18 0 0 1 0 0 1 ] +miss_latency_L1Cache: [binsize: 1 max: 3 count: 5469 average: 3 | standard deviation: 0 | 0 0 0 5469 ] +miss_latency_Directory: [binsize: 1 max: 125 count: 1289 average: 65.7773 | standard deviation: 6.53621 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 9 10 284 430 440 7 1 3 10 10 11 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 5 23 35 1 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -47,14 +47,14 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average: 61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 1288 -miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 321 average: 3 | standard deviation: 0 | 0 0 0 321 ] -miss_latency_LD_Directory: [binsize: 2 max: 285 count: 395 average: 176.514 | standard deviation: 18.6332 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 3 0 110 62 31 116 36 4 1 0 0 0 1 0 1 6 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 2 2 3 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 320 average: 3 | standard deviation: 0 | 0 0 0 320 ] +miss_latency_LD_Directory: [binsize: 1 max: 93 count: 395 average: 65.1494 | standard deviation: 5.26963 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 6 4 94 137 128 1 0 0 4 1 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 9 1 ] miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 494 average: 3 | standard deviation: 0 | 0 0 0 494 ] -miss_latency_ST_Directory: [binsize: 2 max: 371 count: 179 average: 181.905 | standard deviation: 28.882 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 27 44 26 39 17 2 1 0 0 0 2 2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 9 0 2 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 4668 average: 3 | standard deviation: 0 | 0 0 0 4668 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 285 count: 715 average: 178.824 | standard deviation: 21.9931 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 5 2 172 118 76 168 91 3 1 1 0 0 8 9 0 10 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 18 3 4 10 1 0 0 1 0 0 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 1 max: 125 count: 179 average: 67 | standard deviation: 9.07893 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 43 50 63 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 4 8 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 4655 average: 3 | standard deviation: 0 | 0 0 0 4655 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 98 count: 715 average: 65.8182 | standard deviation: 6.37188 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 2 5 147 243 249 5 1 2 5 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 3 16 18 0 0 1 0 0 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -86,11 +86,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 13315 +page_reclaims: 10992 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- @@ -103,9 +103,9 @@ total_msgs: 15444 total_bytes: 617760 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.53982 - links_utilized_percent_switch_0_link_0: 2.54298 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.53667 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 5.96098 + links_utilized_percent_switch_0_link_0: 5.96839 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 5.95357 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 1289 92808 [ 0 0 0 0 1289 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Control: 1285 10280 [ 0 0 0 1285 0 0 0 0 0 0 ] base_latency: 1 @@ -114,9 +114,9 @@ links_utilized_percent_switch_0: 2.53982 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.53982 - links_utilized_percent_switch_1_link_0: 2.53667 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.54298 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 5.96098 + links_utilized_percent_switch_1_link_0: 5.95357 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 5.96839 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Control: 1289 10312 [ 0 0 1289 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Data: 1285 92520 [ 0 0 1285 0 0 0 0 0 0 0 ] base_latency: 1 @@ -125,9 +125,9 @@ links_utilized_percent_switch_1: 2.53982 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 2.53982 - links_utilized_percent_switch_2_link_0: 2.54298 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.53667 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 5.96098 + links_utilized_percent_switch_2_link_0: 5.96839 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 5.95357 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Response_Data: 1289 92808 [ 0 0 0 0 1289 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 1285 10280 [ 0 0 0 1285 0 0 0 0 0 0 ] base_latency: 1 @@ -149,8 +149,8 @@ Cache Stats: system.l1_cntrl0.cacheMemory --- L1Cache --- - Event Counts - -Load [716 ] 716 -Ifetch [5383 ] 5383 +Load [715 ] 715 +Ifetch [5370 ] 5370 Store [673 ] 673 Data [1289 ] 1289 Fwd_GETX [0 ] 0 @@ -168,8 +168,8 @@ I Replacement [0 ] 0 II Writeback_Nack [0 ] 0 -M Load [321 ] 321 -M Ifetch [4668 ] 4668 +M Load [320 ] 320 +M Ifetch [4655 ] 4655 M Store [494 ] 494 M Fwd_GETX [0 ] 0 M Inv [0 ] 0 @@ -190,19 +190,19 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 2574 memory_reads: 1289 memory_writes: 1285 - memory_refreshes: 528 - memory_total_request_delays: 2936 - memory_delays_per_request: 1.14064 - memory_delays_in_input_queue: 668 - memory_delays_behind_head_of_bank_queue: 3 - memory_delays_stalled_at_head_of_bank_queue: 2265 - memory_stalls_for_bank_busy: 847 + memory_refreshes: 750 + memory_total_request_delays: 1873 + memory_delays_per_request: 0.727661 + memory_delays_in_input_queue: 0 + memory_delays_behind_head_of_bank_queue: 2 + memory_delays_stalled_at_head_of_bank_queue: 1871 + memory_stalls_for_bank_busy: 758 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 88 - memory_stalls_for_bus: 1292 + memory_stalls_for_arbitration: 69 + memory_stalls_for_bus: 992 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 38 + memory_stalls_for_read_write_turnaround: 52 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 166 40 36 48 109 42 63 241 50 34 16 26 60 64 38 46 30 88 202 144 40 58 22 20 60 120 136 125 84 134 166 66 diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout index b90476d27..d65bb97a2 100755 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 17:04:37 -gem5 started Aug 13 2012 18:13:09 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:47:14 +gem5 started Sep 9 2012 13:47:33 +gem5 executing on ribera.cs.wisc.edu command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Hello World!Exiting @ tick 253364 because target called exit() +Hello World!Exiting @ tick 107952 because target called exit() diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini index 2a819a3dd..09c807544 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -64,11 +64,13 @@ walker=system.cpu.dtb.walker [system.cpu.dtb.walker] type=X86PagetableWalker +clock=1 system=system port=system.l1_cntrl0.sequencer.slave[3] [system.cpu.interrupts] type=X86LocalApic +clock=1 int_latency=1 pio_addr=2305843009213693952 pio_latency=1 @@ -85,6 +87,7 @@ walker=system.cpu.itb.walker [system.cpu.itb.walker] type=X86PagetableWalker +clock=1 system=system port=system.l1_cntrl0.sequencer.slave[2] @@ -99,7 +102,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello +executable=tests/test-progs/hello/bin/x86/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -139,9 +142,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -150,6 +153,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -186,6 +190,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true +clock=1 dcache=system.l1_cntrl0.cacheMemory deadlock_threshold=500000 icache=system.l1_cntrl0.cacheMemory @@ -202,6 +207,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port s [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -303,6 +309,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats index c3c1b5e46..cd9956361 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats @@ -1,4 +1,4 @@ -Real time: Jul/10/2012 17:59:21 +Real time: Sep/09/2012 13:51:25 Profiler Stats -------------- @@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.54 -Virtual_time_in_minutes: 0.009 -Virtual_time_in_hours: 0.00015 -Virtual_time_in_days: 6.25e-06 +Virtual_time_in_seconds: 0.53 +Virtual_time_in_minutes: 0.00883333 +Virtual_time_in_hours: 0.000147222 +Virtual_time_in_days: 6.13426e-06 -Ruby_current_time: 276484 +Ruby_current_time: 121759 Ruby_start_time: 0 -Ruby_cycles: 276484 +Ruby_cycles: 121759 -mbytes_resident: 51.5117 -mbytes_total: 239.223 -resident_ratio: 0.215346 +mbytes_resident: 59.5742 +mbytes_total: 275.16 +resident_ratio: 0.216522 -ruby_cycles_executed: [ 276485 ] +ruby_cycles_executed: [ 121760 ] Busy Controller Counts: L1Cache-0:0 @@ -29,17 +29,17 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8901 average: 1 | standard deviation: 0 | 0 8901 ] +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8851 average: 1 | standard deviation: 0 | 0 8851 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 371 count: 8900 average: 30.0656 | standard deviation: 63.8436 | 0 7523 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 9 4 1 3 2 328 243 178 299 187 7 4 1 3 0 8 6 4 9 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 6 11 19 16 9 0 1 0 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ] -miss_latency_LD: [binsize: 2 max: 293 count: 1048 average: 86.792 | standard deviation: 89.333 | 0 549 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 1 1 1 1 103 47 87 151 61 1 0 0 1 0 0 1 0 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 3 1 14 8 2 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 2 max: 371 count: 934 average: 50.6017 | standard deviation: 78.9939 | 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 1 66 71 34 32 24 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 8 2 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH: [binsize: 2 max: 369 count: 6910 average: 18.6938 | standard deviation: 50.1996 | 0 6287 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 2 0 1 0 158 125 57 116 102 5 3 0 2 0 8 5 3 4 4 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 2 3 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_RMW_Read: [binsize: 1 max: 169 count: 8 average: 23.75 | standard deviation: 58.6905 | 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_L1Cache: [binsize: 1 max: 3 count: 7523 average: 3 | standard deviation: 0 | 0 0 0 7523 ] -miss_latency_Directory: [binsize: 2 max: 371 count: 1377 average: 177.934 | standard deviation: 21.7881 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 9 4 1 3 2 328 243 178 299 187 7 4 1 3 0 8 6 4 9 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 6 11 19 16 9 0 1 0 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ] +miss_latency: [binsize: 1 max: 125 count: 8850 average: 12.7581 | standard deviation: 22.8706 | 0 0 0 7473 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 10 4 314 433 491 10 7 5 9 5 11 0 1 0 1 0 0 0 1 1 0 0 1 0 0 2 0 0 0 9 16 40 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD: [binsize: 1 max: 101 count: 1044 average: 33.113 | standard deviation: 31.8551 | 0 0 0 545 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 2 97 201 150 1 3 2 0 1 1 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 3 5 22 0 0 1 0 0 0 0 0 1 ] +miss_latency_ST: [binsize: 1 max: 92 count: 934 average: 20.1188 | standard deviation: 28.2308 | 0 0 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 59 62 106 3 0 0 2 0 3 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 2 3 9 ] +miss_latency_IFETCH: [binsize: 1 max: 125 count: 6864 average: 8.66288 | standard deviation: 18.0056 | 0 0 0 6241 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 1 158 170 234 6 4 3 7 4 7 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 4 8 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_RMW_Read: [binsize: 1 max: 65 count: 8 average: 10.75 | standard deviation: 21.9219 | 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_L1Cache: [binsize: 1 max: 3 count: 7473 average: 3 | standard deviation: 0 | 0 0 0 7473 ] +miss_latency_Directory: [binsize: 1 max: 125 count: 1377 average: 65.7153 | standard deviation: 6.33839 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 10 4 314 433 491 10 7 5 9 5 11 0 1 0 1 0 0 0 1 1 0 0 1 0 0 2 0 0 0 9 16 40 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -48,16 +48,16 @@ imcomplete_wCC_Times: 0 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average: 61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] imcomplete_dir_Times: 1376 -miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 549 average: 3 | standard deviation: 0 | 0 0 0 549 ] -miss_latency_LD_Directory: [binsize: 2 max: 293 count: 499 average: 178.98 | standard deviation: 22.8519 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 1 1 1 1 103 47 87 151 61 1 0 0 1 0 0 1 0 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 3 1 14 8 2 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 545 average: 3 | standard deviation: 0 | 0 0 0 545 ] +miss_latency_LD_Directory: [binsize: 1 max: 101 count: 499 average: 66.002 | standard deviation: 7.00186 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 2 97 201 150 1 3 2 0 1 1 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 3 5 22 0 0 1 0 0 0 0 0 1 ] miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 680 average: 3 | standard deviation: 0 | 0 0 0 680 ] -miss_latency_ST_Directory: [binsize: 2 max: 371 count: 254 average: 178.039 | standard deviation: 24.8377 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 1 66 71 34 32 24 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 8 2 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] -miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 6287 average: 3 | standard deviation: 0 | 0 0 0 6287 ] -miss_latency_IFETCH_Directory: [binsize: 2 max: 369 count: 623 average: 177.067 | standard deviation: 19.4782 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 2 0 1 0 158 125 57 116 102 5 3 0 2 0 8 5 3 4 4 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 2 3 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_ST_Directory: [binsize: 1 max: 92 count: 254 average: 65.9488 | standard deviation: 6.5357 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 59 62 106 3 0 0 2 0 3 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 2 3 9 ] +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 6241 average: 3 | standard deviation: 0 | 0 0 0 6241 ] +miss_latency_IFETCH_Directory: [binsize: 1 max: 125 count: 623 average: 65.3917 | standard deviation: 5.66183 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 1 158 170 234 6 4 3 7 4 7 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 4 8 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] miss_latency_RMW_Read_L1Cache: [binsize: 1 max: 3 count: 7 average: 3 | standard deviation: 0 | 0 0 0 7 ] -miss_latency_RMW_Read_Directory: [binsize: 1 max: 169 count: 1 average: 169 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_RMW_Read_Directory: [binsize: 1 max: 65 count: 1 average: 65 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -89,11 +89,11 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 14592 +page_reclaims: 11362 page_faults: 0 swaps: 0 block_inputs: 0 -block_outputs: 0 +block_outputs: 80 Network Stats ------------- @@ -106,9 +106,9 @@ total_msgs: 16500 total_bytes: 660000 switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 2.48658 - links_utilized_percent_switch_0_link_0: 2.48947 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 2.48369 bw: 16000 base_latency: 1 +links_utilized_percent_switch_0: 5.6464 + links_utilized_percent_switch_0_link_0: 5.65297 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 5.63983 bw: 16000 base_latency: 1 outgoing_messages_switch_0_link_0_Response_Data: 1377 99144 [ 0 0 0 0 1377 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_0_link_0_Writeback_Control: 1373 10984 [ 0 0 0 1373 0 0 0 0 0 0 ] base_latency: 1 @@ -117,9 +117,9 @@ links_utilized_percent_switch_0: 2.48658 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 2.48658 - links_utilized_percent_switch_1_link_0: 2.48369 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 2.48947 bw: 16000 base_latency: 1 +links_utilized_percent_switch_1: 5.6464 + links_utilized_percent_switch_1_link_0: 5.63983 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 5.65297 bw: 16000 base_latency: 1 outgoing_messages_switch_1_link_0_Control: 1377 11016 [ 0 0 1377 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_0_Data: 1373 98856 [ 0 0 1373 0 0 0 0 0 0 0 ] base_latency: 1 @@ -128,9 +128,9 @@ links_utilized_percent_switch_1: 2.48658 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 2.48658 - links_utilized_percent_switch_2_link_0: 2.48947 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 2.48369 bw: 16000 base_latency: 1 +links_utilized_percent_switch_2: 5.6464 + links_utilized_percent_switch_2_link_0: 5.65297 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 5.63983 bw: 16000 base_latency: 1 outgoing_messages_switch_2_link_0_Response_Data: 1377 99144 [ 0 0 0 0 1377 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 1373 10984 [ 0 0 0 1373 0 0 0 0 0 0 ] base_latency: 1 @@ -152,8 +152,8 @@ Cache Stats: system.l1_cntrl0.cacheMemory --- L1Cache --- - Event Counts - -Load [1048 ] 1048 -Ifetch [6910 ] 6910 +Load [1044 ] 1044 +Ifetch [6864 ] 6864 Store [942 ] 942 Data [1377 ] 1377 Fwd_GETX [0 ] 0 @@ -171,8 +171,8 @@ I Replacement [0 ] 0 II Writeback_Nack [0 ] 0 -M Load [549 ] 549 -M Ifetch [6287 ] 6287 +M Load [545 ] 545 +M Ifetch [6241 ] 6241 M Store [687 ] 687 M Fwd_GETX [0 ] 0 M Inv [0 ] 0 @@ -193,19 +193,19 @@ Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 2750 memory_reads: 1377 memory_writes: 1373 - memory_refreshes: 576 - memory_total_request_delays: 3035 - memory_delays_per_request: 1.10364 - memory_delays_in_input_queue: 743 - memory_delays_behind_head_of_bank_queue: 6 - memory_delays_stalled_at_head_of_bank_queue: 2286 - memory_stalls_for_bank_busy: 791 + memory_refreshes: 846 + memory_total_request_delays: 1965 + memory_delays_per_request: 0.714545 + memory_delays_in_input_queue: 0 + memory_delays_behind_head_of_bank_queue: 3 + memory_delays_stalled_at_head_of_bank_queue: 1962 + memory_stalls_for_bank_busy: 830 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 78 - memory_stalls_for_bus: 1373 + memory_stalls_for_arbitration: 62 + memory_stalls_for_bus: 1039 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 44 + memory_stalls_for_read_write_turnaround: 31 memory_stalls_for_read_read_turnaround: 0 accesses_per_bank: 160 144 210 146 196 96 66 38 22 20 184 297 71 124 60 18 84 6 8 14 92 56 14 60 34 58 84 66 42 122 104 54 diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout index f0077f0d5..290b12614 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout @@ -1,11 +1,13 @@ +Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout +Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 17:08:22 -gem5 started Aug 13 2012 18:23:02 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:51:17 +gem5 started Sep 9 2012 13:51:25 +gem5 executing on ribera.cs.wisc.edu command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 276484 because target called exit() +Exiting @ tick 121759 because target called exit() |