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-rw-r--r--tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini4
-rwxr-xr-xtests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout6
-rw-r--r--tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt12
-rw-r--r--tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini2
-rwxr-xr-xtests/quick/se/00.hello/ref/arm/linux/o3-timing/simout6
-rw-r--r--tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt12
6 files changed, 21 insertions, 21 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini
index 78e5f6bf3..69978e99c 100644
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini
@@ -276,7 +276,7 @@ id_aa64isar0_el1=0
id_aa64isar1_el1=0
id_aa64mmfr0_el1=15728642
id_aa64mmfr1_el1=0
-id_aa64pfr0_el1=17
+id_aa64pfr0_el1=34
id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
@@ -816,7 +816,7 @@ id_aa64isar0_el1=0
id_aa64isar1_el1=0
id_aa64mmfr0_el1=15728642
id_aa64mmfr1_el1=0
-id_aa64pfr0_el1=17
+id_aa64pfr0_el1=34
id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout
index 8c38643eb..09d4a73db 100755
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout
@@ -3,9 +3,9 @@ Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 21 2016 14:37:41
-gem5 started Jul 21 2016 14:41:21
-gem5 executing on e108600-lin, pid 23122
+gem5 compiled Aug 1 2016 17:10:05
+gem5 started Aug 1 2016 17:27:25
+gem5 executing on e108600-lin, pid 12519
command line: /work/curdun01/gem5-external.hg/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/arm/linux/o3-timing-checker
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt
index f9ef4c918..117199ea9 100644
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000017 # Nu
sim_ticks 17232500 # Number of ticks simulated
final_tick 17232500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 43349 # Simulator instruction rate (inst/s)
-host_op_rate 50759 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 162616088 # Simulator tick rate (ticks/s)
-host_mem_usage 265888 # Number of bytes of host memory used
-host_seconds 0.11 # Real time elapsed on the host
+host_inst_rate 74373 # Simulator instruction rate (inst/s)
+host_op_rate 87086 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 279001739 # Simulator tick rate (ticks/s)
+host_mem_usage 265896 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -803,7 +803,7 @@ system.cpu.int_regfile_writes 4270 # nu
system.cpu.fp_regfile_reads 32 # number of floating regfile reads
system.cpu.cc_regfile_reads 27801 # number of cc regfile reads
system.cpu.cc_regfile_writes 3276 # number of cc regfile writes
-system.cpu.misc_regfile_reads 2978 # number of misc regfile reads
+system.cpu.misc_regfile_reads 2980 # number of misc regfile reads
system.cpu.misc_regfile_writes 24 # number of misc regfile writes
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 17232500 # Cumulative time (in ticks) in various power states
system.cpu.dcache.tags.replacements 0 # number of replacements
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
index fc0ffed98..9180fbc8c 100644
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
@@ -594,7 +594,7 @@ id_aa64isar0_el1=0
id_aa64isar1_el1=0
id_aa64mmfr0_el1=15728642
id_aa64mmfr1_el1=0
-id_aa64pfr0_el1=17
+id_aa64pfr0_el1=34
id_aa64pfr1_el1=0
id_isar0=34607377
id_isar1=34677009
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
index 10d18de27..9e032676c 100755
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
@@ -3,9 +3,9 @@ Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 21 2016 14:37:41
-gem5 started Jul 21 2016 15:07:36
-gem5 executing on e108600-lin, pid 24410
+gem5 compiled Aug 1 2016 17:10:05
+gem5 started Aug 1 2016 17:10:34
+gem5 executing on e108600-lin, pid 12211
command line: /work/curdun01/gem5-external.hg/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
index 1e33086fd..7324072b2 100644
--- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000019 # Nu
sim_ticks 18821000 # Number of ticks simulated
final_tick 18821000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 60061 # Simulator instruction rate (inst/s)
-host_op_rate 70319 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 246027411 # Simulator tick rate (ticks/s)
-host_mem_usage 262688 # Number of bytes of host memory used
-host_seconds 0.08 # Real time elapsed on the host
+host_inst_rate 81076 # Simulator instruction rate (inst/s)
+host_op_rate 94934 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 332169191 # Simulator tick rate (ticks/s)
+host_mem_usage 262700 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -679,7 +679,7 @@ system.cpu.int_regfile_writes 3787 # nu
system.cpu.fp_regfile_reads 16 # number of floating regfile reads
system.cpu.cc_regfile_reads 24229 # number of cc regfile reads
system.cpu.cc_regfile_writes 2921 # number of cc regfile writes
-system.cpu.misc_regfile_reads 2562 # number of misc regfile reads
+system.cpu.misc_regfile_reads 2564 # number of misc regfile reads
system.cpu.misc_regfile_writes 24 # number of misc regfile writes
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 18821000 # Cumulative time (in ticks) in various power states
system.cpu.dcache.tags.replacements 1 # number of replacements