diff options
Diffstat (limited to 'tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt')
4 files changed, 0 insertions, 2114 deletions
diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini deleted file mode 100644 index d465f3325..000000000 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini +++ /dev/null @@ -1,908 +0,0 @@ -[root] -type=Root -children=system -eventq_index=0 -full_system=false -sim_quantum=0 -time_sync_enable=false -time_sync_period=100000000000 -time_sync_spin_threshold=100000000 - -[system] -type=System -children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain -boot_osflags=a -cache_line_size=64 -clk_domain=system.clk_domain -default_p_state=UNDEFINED -eventq_index=0 -exit_on_work_items=false -init_param=0 -kernel= -kernel_addr_check=true -load_addr_mask=1099511627775 -load_offset=0 -mem_mode=timing -mem_ranges= -memories=system.physmem -mmap_using_noreserve=false -multi_thread=true -num_work_ids=16 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -readfile= -symbolfile= -thermal_components= -thermal_model=Null -work_begin_ckpt_count=0 -work_begin_cpu_id_exit=-1 -work_begin_exit_count=0 -work_cpus_ckpt_count=0 -work_end_ckpt_count=0 -work_end_exit_count=0 -work_item_id=-1 -system_port=system.membus.slave[0] - -[system.clk_domain] -type=SrcClockDomain -clock=1000 -domain_id=-1 -eventq_index=0 -init_perf_level=0 -voltage_domain=system.voltage_domain - -[system.cpu] -type=DerivO3CPU -children=branchPred dcache dtb fuPool icache interrupts0 interrupts1 isa0 isa1 itb l2cache toL2Bus tracer workload0 workload1 -LFSTSize=1024 -LQEntries=32 -LSQCheckLoads=true -LSQDepCheckShift=4 -SQEntries=32 -SSITSize=1024 -activity=0 -backComSize=5 -branchPred=system.cpu.branchPred -cacheStorePorts=200 -checker=Null -clk_domain=system.cpu_clk_domain -commitToDecodeDelay=1 -commitToFetchDelay=1 -commitToIEWDelay=1 -commitToRenameDelay=1 -commitWidth=8 -cpu_id=0 -decodeToFetchDelay=1 -decodeToRenameDelay=1 -decodeWidth=8 -default_p_state=UNDEFINED -dispatchWidth=8 -do_checkpoint_insts=true -do_quiesce=true -do_statistics_insts=true -dtb=system.cpu.dtb -eventq_index=0 -fetchBufferSize=64 -fetchQueueSize=32 -fetchToDecodeDelay=1 -fetchTrapLatency=1 -fetchWidth=8 -forwardComSize=5 -fuPool=system.cpu.fuPool -function_trace=false -function_trace_start=0 -iewToCommitDelay=1 -iewToDecodeDelay=1 -iewToFetchDelay=1 -iewToRenameDelay=1 -interrupts=system.cpu.interrupts0 system.cpu.interrupts1 -isa=system.cpu.isa0 system.cpu.isa1 -issueToExecuteDelay=1 -issueWidth=8 -itb=system.cpu.itb -max_insts_all_threads=0 -max_insts_any_thread=0 -max_loads_all_threads=0 -max_loads_any_thread=0 -needsTSO=false -numIQEntries=64 -numPhysCCRegs=0 -numPhysFloatRegs=256 -numPhysIntRegs=256 -numROBEntries=192 -numRobs=1 -numThreads=2 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -profile=0 -progress_interval=0 -renameToDecodeDelay=1 -renameToFetchDelay=1 -renameToIEWDelay=2 -renameToROBDelay=1 -renameWidth=8 -simpoint_start_insts= -smtCommitPolicy=RoundRobin -smtFetchPolicy=SingleThread -smtIQPolicy=Partitioned -smtIQThreshold=100 -smtLSQPolicy=Partitioned -smtLSQThreshold=100 -smtNumFetchingThreads=1 -smtROBPolicy=Partitioned -smtROBThreshold=100 -socket_id=0 -squashWidth=8 -store_set_clear_period=250000 -switched_out=false -syscallRetryLatency=10000 -system=system -tracer=system.cpu.tracer -trapLatency=13 -wbWidth=8 -workload=system.cpu.workload0 system.cpu.workload1 -dcache_port=system.cpu.dcache.cpu_side -icache_port=system.cpu.icache.cpu_side - -[system.cpu.branchPred] -type=TournamentBP -BTBEntries=4096 -BTBTagSize=16 -RASSize=16 -choiceCtrBits=2 -choicePredictorSize=8192 -eventq_index=0 -globalCtrBits=2 -globalPredictorSize=8192 -indirectHashGHR=true -indirectHashTargets=true -indirectPathLength=3 -indirectSets=256 -indirectTagSize=16 -indirectWays=2 -instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 -numThreads=2 -useIndirect=true - -[system.cpu.dcache] -type=Cache -children=tags -addr_ranges=0:18446744073709551615:0:0:0:0 -assoc=2 -clk_domain=system.cpu_clk_domain -clusivity=mostly_incl -data_latency=2 -default_p_state=UNDEFINED -demand_mshr_reserve=1 -eventq_index=0 -is_read_only=false -max_miss_count=0 -mshrs=4 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -prefetch_on_access=false -prefetcher=Null -response_latency=2 -sequential_access=false -size=262144 -system=system -tag_latency=2 -tags=system.cpu.dcache.tags -tgts_per_mshr=20 -write_buffers=8 -writeback_clean=false -cpu_side=system.cpu.dcache_port -mem_side=system.cpu.toL2Bus.slave[1] - -[system.cpu.dcache.tags] -type=LRU -assoc=2 -block_size=64 -clk_domain=system.cpu_clk_domain -data_latency=2 -default_p_state=UNDEFINED -eventq_index=0 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -sequential_access=false -size=262144 -tag_latency=2 - -[system.cpu.dtb] -type=AlphaTLB -eventq_index=0 -size=64 - -[system.cpu.fuPool] -type=FUPool -children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 -FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 -eventq_index=0 - -[system.cpu.fuPool.FUList0] -type=FUDesc -children=opList -count=6 -eventq_index=0 -opList=system.cpu.fuPool.FUList0.opList - -[system.cpu.fuPool.FUList0.opList] -type=OpDesc -eventq_index=0 -opClass=IntAlu -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList1] -type=FUDesc -children=opList0 opList1 -count=2 -eventq_index=0 -opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 - -[system.cpu.fuPool.FUList1.opList0] -type=OpDesc -eventq_index=0 -opClass=IntMult -opLat=3 -pipelined=true - -[system.cpu.fuPool.FUList1.opList1] -type=OpDesc -eventq_index=0 -opClass=IntDiv -opLat=20 -pipelined=false - -[system.cpu.fuPool.FUList2] -type=FUDesc -children=opList0 opList1 opList2 -count=4 -eventq_index=0 -opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 - -[system.cpu.fuPool.FUList2.opList0] -type=OpDesc -eventq_index=0 -opClass=FloatAdd -opLat=2 -pipelined=true - -[system.cpu.fuPool.FUList2.opList1] -type=OpDesc -eventq_index=0 -opClass=FloatCmp -opLat=2 -pipelined=true - -[system.cpu.fuPool.FUList2.opList2] -type=OpDesc -eventq_index=0 -opClass=FloatCvt -opLat=2 -pipelined=true - -[system.cpu.fuPool.FUList3] -type=FUDesc -children=opList0 opList1 opList2 opList3 opList4 -count=2 -eventq_index=0 -opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4 - -[system.cpu.fuPool.FUList3.opList0] -type=OpDesc -eventq_index=0 -opClass=FloatMult -opLat=4 -pipelined=true - -[system.cpu.fuPool.FUList3.opList1] -type=OpDesc -eventq_index=0 -opClass=FloatMultAcc -opLat=5 -pipelined=true - -[system.cpu.fuPool.FUList3.opList2] -type=OpDesc -eventq_index=0 -opClass=FloatMisc -opLat=3 -pipelined=true - -[system.cpu.fuPool.FUList3.opList3] -type=OpDesc -eventq_index=0 -opClass=FloatDiv -opLat=12 -pipelined=false - -[system.cpu.fuPool.FUList3.opList4] -type=OpDesc -eventq_index=0 -opClass=FloatSqrt -opLat=24 -pipelined=false - -[system.cpu.fuPool.FUList4] -type=FUDesc -children=opList0 opList1 -count=0 -eventq_index=0 -opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1 - -[system.cpu.fuPool.FUList4.opList0] -type=OpDesc -eventq_index=0 -opClass=MemRead -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList4.opList1] -type=OpDesc -eventq_index=0 -opClass=FloatMemRead -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5] -type=FUDesc -children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 -count=4 -eventq_index=0 -opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 - -[system.cpu.fuPool.FUList5.opList00] -type=OpDesc -eventq_index=0 -opClass=SimdAdd -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList01] -type=OpDesc -eventq_index=0 -opClass=SimdAddAcc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList02] -type=OpDesc -eventq_index=0 -opClass=SimdAlu -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList03] -type=OpDesc -eventq_index=0 -opClass=SimdCmp -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList04] -type=OpDesc -eventq_index=0 -opClass=SimdCvt -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList05] -type=OpDesc -eventq_index=0 -opClass=SimdMisc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList06] -type=OpDesc -eventq_index=0 -opClass=SimdMult -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList07] -type=OpDesc -eventq_index=0 -opClass=SimdMultAcc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList08] -type=OpDesc -eventq_index=0 -opClass=SimdShift -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList09] -type=OpDesc -eventq_index=0 -opClass=SimdShiftAcc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList10] -type=OpDesc -eventq_index=0 -opClass=SimdSqrt -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList11] -type=OpDesc -eventq_index=0 -opClass=SimdFloatAdd -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList12] -type=OpDesc -eventq_index=0 -opClass=SimdFloatAlu -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList13] -type=OpDesc -eventq_index=0 -opClass=SimdFloatCmp -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList14] -type=OpDesc -eventq_index=0 -opClass=SimdFloatCvt -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList15] -type=OpDesc -eventq_index=0 -opClass=SimdFloatDiv -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList16] -type=OpDesc -eventq_index=0 -opClass=SimdFloatMisc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList17] -type=OpDesc -eventq_index=0 -opClass=SimdFloatMult -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList18] -type=OpDesc -eventq_index=0 -opClass=SimdFloatMultAcc -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList5.opList19] -type=OpDesc -eventq_index=0 -opClass=SimdFloatSqrt -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList6] -type=FUDesc -children=opList0 opList1 -count=0 -eventq_index=0 -opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1 - -[system.cpu.fuPool.FUList6.opList0] -type=OpDesc -eventq_index=0 -opClass=MemWrite -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList6.opList1] -type=OpDesc -eventq_index=0 -opClass=FloatMemWrite -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList7] -type=FUDesc -children=opList0 opList1 opList2 opList3 -count=4 -eventq_index=0 -opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3 - -[system.cpu.fuPool.FUList7.opList0] -type=OpDesc -eventq_index=0 -opClass=MemRead -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList7.opList1] -type=OpDesc -eventq_index=0 -opClass=MemWrite -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList7.opList2] -type=OpDesc -eventq_index=0 -opClass=FloatMemRead -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList7.opList3] -type=OpDesc -eventq_index=0 -opClass=FloatMemWrite -opLat=1 -pipelined=true - -[system.cpu.fuPool.FUList8] -type=FUDesc -children=opList -count=1 -eventq_index=0 -opList=system.cpu.fuPool.FUList8.opList - -[system.cpu.fuPool.FUList8.opList] -type=OpDesc -eventq_index=0 -opClass=IprAccess -opLat=3 -pipelined=false - -[system.cpu.icache] -type=Cache -children=tags -addr_ranges=0:18446744073709551615:0:0:0:0 -assoc=2 -clk_domain=system.cpu_clk_domain -clusivity=mostly_incl -data_latency=2 -default_p_state=UNDEFINED -demand_mshr_reserve=1 -eventq_index=0 -is_read_only=true -max_miss_count=0 -mshrs=4 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -prefetch_on_access=false -prefetcher=Null -response_latency=2 -sequential_access=false -size=131072 -system=system -tag_latency=2 -tags=system.cpu.icache.tags -tgts_per_mshr=20 -write_buffers=8 -writeback_clean=true -cpu_side=system.cpu.icache_port -mem_side=system.cpu.toL2Bus.slave[0] - -[system.cpu.icache.tags] -type=LRU -assoc=2 -block_size=64 -clk_domain=system.cpu_clk_domain -data_latency=2 -default_p_state=UNDEFINED -eventq_index=0 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -sequential_access=false -size=131072 -tag_latency=2 - -[system.cpu.interrupts0] -type=AlphaInterrupts -eventq_index=0 - -[system.cpu.interrupts1] -type=AlphaInterrupts -eventq_index=0 - -[system.cpu.isa0] -type=AlphaISA -eventq_index=0 -system=system - -[system.cpu.isa1] -type=AlphaISA -eventq_index=0 -system=system - -[system.cpu.itb] -type=AlphaTLB -eventq_index=0 -size=48 - -[system.cpu.l2cache] -type=Cache -children=tags -addr_ranges=0:18446744073709551615:0:0:0:0 -assoc=8 -clk_domain=system.cpu_clk_domain -clusivity=mostly_incl -data_latency=20 -default_p_state=UNDEFINED -demand_mshr_reserve=1 -eventq_index=0 -is_read_only=false -max_miss_count=0 -mshrs=20 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -prefetch_on_access=false -prefetcher=Null -response_latency=20 -sequential_access=false -size=2097152 -system=system -tag_latency=20 -tags=system.cpu.l2cache.tags -tgts_per_mshr=12 -write_buffers=8 -writeback_clean=false -cpu_side=system.cpu.toL2Bus.master[0] -mem_side=system.membus.slave[1] - -[system.cpu.l2cache.tags] -type=LRU -assoc=8 -block_size=64 -clk_domain=system.cpu_clk_domain -data_latency=20 -default_p_state=UNDEFINED -eventq_index=0 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -power_model=Null -sequential_access=false -size=2097152 -tag_latency=20 - -[system.cpu.toL2Bus] -type=CoherentXBar -children=snoop_filter -clk_domain=system.cpu_clk_domain -default_p_state=UNDEFINED -eventq_index=0 -forward_latency=0 -frontend_latency=1 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -point_of_coherency=false -power_model=Null -response_latency=1 -snoop_filter=system.cpu.toL2Bus.snoop_filter -snoop_response_latency=1 -system=system -use_default_range=false -width=32 -master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side - -[system.cpu.toL2Bus.snoop_filter] -type=SnoopFilter -eventq_index=0 -lookup_latency=0 -max_capacity=8388608 -system=system - -[system.cpu.tracer] -type=ExeTracer -eventq_index=0 - -[system.cpu.workload0] -type=Process -cmd=hello -cwd= -drivers= -egid=100 -env= -errout=cerr -euid=100 -eventq_index=0 -executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello -gid=100 -input=cin -kvmInSE=false -maxStackSize=67108864 -output=cout -pgid=100 -pid=100 -ppid=0 -simpoint=0 -system=system -uid=100 -useArchPT=false - -[system.cpu.workload1] -type=Process -cmd=hello -cwd= -drivers= -egid=100 -env= -errout=cerr -euid=100 -eventq_index=0 -executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello -gid=100 -input=cin -kvmInSE=false -maxStackSize=67108864 -output=cout -pgid=100 -pid=101 -ppid=100 -simpoint=0 -system=system -uid=100 -useArchPT=false - -[system.cpu_clk_domain] -type=SrcClockDomain -clock=500 -domain_id=-1 -eventq_index=0 -init_perf_level=0 -voltage_domain=system.voltage_domain - -[system.dvfs_handler] -type=DVFSHandler -domains= -enable=false -eventq_index=0 -sys_clk_domain=system.clk_domain -transition_latency=100000000 - -[system.membus] -type=CoherentXBar -children=snoop_filter -clk_domain=system.clk_domain -default_p_state=UNDEFINED -eventq_index=0 -forward_latency=4 -frontend_latency=3 -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -point_of_coherency=true -power_model=Null -response_latency=2 -snoop_filter=system.membus.snoop_filter -snoop_response_latency=4 -system=system -use_default_range=false -width=16 -master=system.physmem.port -slave=system.system_port system.cpu.l2cache.mem_side - -[system.membus.snoop_filter] -type=SnoopFilter -eventq_index=0 -lookup_latency=1 -max_capacity=8388608 -system=system - -[system.physmem] -type=DRAMCtrl -IDD0=0.055000 -IDD02=0.000000 -IDD2N=0.032000 -IDD2N2=0.000000 -IDD2P0=0.000000 -IDD2P02=0.000000 -IDD2P1=0.032000 -IDD2P12=0.000000 -IDD3N=0.038000 -IDD3N2=0.000000 -IDD3P0=0.000000 -IDD3P02=0.000000 -IDD3P1=0.038000 -IDD3P12=0.000000 -IDD4R=0.157000 -IDD4R2=0.000000 -IDD4W=0.125000 -IDD4W2=0.000000 -IDD5=0.235000 -IDD52=0.000000 -IDD6=0.020000 -IDD62=0.000000 -VDD=1.500000 -VDD2=0.000000 -activation_limit=4 -addr_mapping=RoRaBaCoCh -bank_groups_per_rank=0 -banks_per_rank=8 -burst_length=8 -channels=1 -clk_domain=system.clk_domain -conf_table_reported=true -default_p_state=UNDEFINED -device_bus_width=8 -device_rowbuffer_size=1024 -device_size=536870912 -devices_per_rank=8 -dll=true -eventq_index=0 -in_addr_map=true -kvm_map=true -max_accesses_per_row=16 -mem_sched_policy=frfcfs -min_writes_per_switch=16 -null=false -p_state_clk_gate_bins=20 -p_state_clk_gate_max=1000000000000 -p_state_clk_gate_min=1000 -page_policy=open_adaptive -power_model=Null -range=0:134217727:0:0:0:0 -ranks_per_channel=2 -read_buffer_size=32 -static_backend_latency=10000 -static_frontend_latency=10000 -tBURST=5000 -tCCD_L=0 -tCK=1250 -tCL=13750 -tCS=2500 -tRAS=35000 -tRCD=13750 -tREFI=7800000 -tRFC=260000 -tRP=13750 -tRRD=6000 -tRRD_L=0 -tRTP=7500 -tRTW=2500 -tWR=15000 -tWTR=7500 -tXAW=30000 -tXP=6000 -tXPDLL=0 -tXS=270000 -tXSDLL=0 -write_buffer_size=64 -write_high_thresh_perc=85 -write_low_thresh_perc=50 -port=system.membus.master[0] - -[system.voltage_domain] -type=VoltageDomain -eventq_index=0 -voltage=1.000000 - diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr deleted file mode 100755 index b1d1f26e1..000000000 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simerr +++ /dev/null @@ -1,7 +0,0 @@ -warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) -warn: Sockets disabled, not accepting gdb connections -warn: ClockedObject: More than one power state change request encountered within the same simulation tick -warn: ClockedObject: Already in the requested power state, request ignored -info: Entering event queue @ 0. Starting simulation... -info: Increasing stack size by one page. -info: Increasing stack size by one page. diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout deleted file mode 100755 index 45d42fd47..000000000 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/simout +++ /dev/null @@ -1,14 +0,0 @@ -Redirecting stdout to build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt/simout -Redirecting stderr to build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt/simerr -gem5 Simulator System. http://gem5.org -gem5 is copyrighted software; use the --copyright option for details. - -gem5 compiled Mar 29 2017 21:52:42 -gem5 started Mar 29 2017 21:52:53 -gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 118268 -command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt - -Global frequency set at 1000000000000 ticks per second -Hello world! -Hello world! -Exiting @ tick 27117500 because exiting with last active thread context diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt deleted file mode 100644 index 1efa6d783..000000000 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/stats.txt +++ /dev/null @@ -1,1185 +0,0 @@ - ----------- Begin Simulation Statistics ---------- -sim_seconds 0.000027 -sim_ticks 27117500 -final_tick 27117500 -sim_freq 1000000000000 -host_inst_rate 121145 -host_op_rate 121128 -host_tick_rate 257188425 -host_mem_usage 265776 -host_seconds 0.11 -sim_insts 12770 -sim_ops 12770 -system.voltage_domain.voltage 1 -system.clk_domain.clock 1000 -system.physmem.pwrStateResidencyTicks::UNDEFINED 27117500 -system.physmem.bytes_read::cpu.inst 39680 -system.physmem.bytes_read::cpu.data 21888 -system.physmem.bytes_read::total 61568 -system.physmem.bytes_inst_read::cpu.inst 39680 -system.physmem.bytes_inst_read::total 39680 -system.physmem.num_reads::cpu.inst 620 -system.physmem.num_reads::cpu.data 342 -system.physmem.num_reads::total 962 -system.physmem.bw_read::cpu.inst 1463261731 -system.physmem.bw_read::cpu.data 807154052 -system.physmem.bw_read::total 2270415783 -system.physmem.bw_inst_read::cpu.inst 1463261731 -system.physmem.bw_inst_read::total 1463261731 -system.physmem.bw_total::cpu.inst 1463261731 -system.physmem.bw_total::cpu.data 807154052 -system.physmem.bw_total::total 2270415783 -system.physmem.readReqs 963 -system.physmem.writeReqs 0 -system.physmem.readBursts 963 -system.physmem.writeBursts 0 -system.physmem.bytesReadDRAM 61632 -system.physmem.bytesReadWrQ 0 -system.physmem.bytesWritten 0 -system.physmem.bytesReadSys 61632 -system.physmem.bytesWrittenSys 0 -system.physmem.servicedByWrQ 0 -system.physmem.mergedWrBursts 0 -system.physmem.neitherReadNorWriteReqs 0 -system.physmem.perBankRdBursts::0 82 -system.physmem.perBankRdBursts::1 150 -system.physmem.perBankRdBursts::2 77 -system.physmem.perBankRdBursts::3 59 -system.physmem.perBankRdBursts::4 88 -system.physmem.perBankRdBursts::5 45 -system.physmem.perBankRdBursts::6 32 -system.physmem.perBankRdBursts::7 50 -system.physmem.perBankRdBursts::8 42 -system.physmem.perBankRdBursts::9 38 -system.physmem.perBankRdBursts::10 28 -system.physmem.perBankRdBursts::11 33 -system.physmem.perBankRdBursts::12 15 -system.physmem.perBankRdBursts::13 120 -system.physmem.perBankRdBursts::14 67 -system.physmem.perBankRdBursts::15 37 -system.physmem.perBankWrBursts::0 0 -system.physmem.perBankWrBursts::1 0 -system.physmem.perBankWrBursts::2 0 -system.physmem.perBankWrBursts::3 0 -system.physmem.perBankWrBursts::4 0 -system.physmem.perBankWrBursts::5 0 -system.physmem.perBankWrBursts::6 0 -system.physmem.perBankWrBursts::7 0 -system.physmem.perBankWrBursts::8 0 -system.physmem.perBankWrBursts::9 0 -system.physmem.perBankWrBursts::10 0 -system.physmem.perBankWrBursts::11 0 -system.physmem.perBankWrBursts::12 0 -system.physmem.perBankWrBursts::13 0 -system.physmem.perBankWrBursts::14 0 -system.physmem.perBankWrBursts::15 0 -system.physmem.numRdRetry 0 -system.physmem.numWrRetry 0 -system.physmem.totGap 27086500 -system.physmem.readPktSize::0 0 -system.physmem.readPktSize::1 0 -system.physmem.readPktSize::2 0 -system.physmem.readPktSize::3 0 -system.physmem.readPktSize::4 0 -system.physmem.readPktSize::5 0 -system.physmem.readPktSize::6 963 -system.physmem.writePktSize::0 0 -system.physmem.writePktSize::1 0 -system.physmem.writePktSize::2 0 -system.physmem.writePktSize::3 0 -system.physmem.writePktSize::4 0 -system.physmem.writePktSize::5 0 -system.physmem.writePktSize::6 0 -system.physmem.rdQLenPdf::0 329 -system.physmem.rdQLenPdf::1 321 -system.physmem.rdQLenPdf::2 178 -system.physmem.rdQLenPdf::3 95 -system.physmem.rdQLenPdf::4 35 -system.physmem.rdQLenPdf::5 5 -system.physmem.rdQLenPdf::6 0 -system.physmem.rdQLenPdf::7 0 -system.physmem.rdQLenPdf::8 0 -system.physmem.rdQLenPdf::9 0 -system.physmem.rdQLenPdf::10 0 -system.physmem.rdQLenPdf::11 0 -system.physmem.rdQLenPdf::12 0 -system.physmem.rdQLenPdf::13 0 -system.physmem.rdQLenPdf::14 0 -system.physmem.rdQLenPdf::15 0 -system.physmem.rdQLenPdf::16 0 -system.physmem.rdQLenPdf::17 0 -system.physmem.rdQLenPdf::18 0 -system.physmem.rdQLenPdf::19 0 -system.physmem.rdQLenPdf::20 0 -system.physmem.rdQLenPdf::21 0 -system.physmem.rdQLenPdf::22 0 -system.physmem.rdQLenPdf::23 0 -system.physmem.rdQLenPdf::24 0 -system.physmem.rdQLenPdf::25 0 -system.physmem.rdQLenPdf::26 0 -system.physmem.rdQLenPdf::27 0 -system.physmem.rdQLenPdf::28 0 -system.physmem.rdQLenPdf::29 0 -system.physmem.rdQLenPdf::30 0 -system.physmem.rdQLenPdf::31 0 -system.physmem.wrQLenPdf::0 0 -system.physmem.wrQLenPdf::1 0 -system.physmem.wrQLenPdf::2 0 -system.physmem.wrQLenPdf::3 0 -system.physmem.wrQLenPdf::4 0 -system.physmem.wrQLenPdf::5 0 -system.physmem.wrQLenPdf::6 0 -system.physmem.wrQLenPdf::7 0 -system.physmem.wrQLenPdf::8 0 -system.physmem.wrQLenPdf::9 0 -system.physmem.wrQLenPdf::10 0 -system.physmem.wrQLenPdf::11 0 -system.physmem.wrQLenPdf::12 0 -system.physmem.wrQLenPdf::13 0 -system.physmem.wrQLenPdf::14 0 -system.physmem.wrQLenPdf::15 0 -system.physmem.wrQLenPdf::16 0 -system.physmem.wrQLenPdf::17 0 -system.physmem.wrQLenPdf::18 0 -system.physmem.wrQLenPdf::19 0 -system.physmem.wrQLenPdf::20 0 -system.physmem.wrQLenPdf::21 0 -system.physmem.wrQLenPdf::22 0 -system.physmem.wrQLenPdf::23 0 -system.physmem.wrQLenPdf::24 0 -system.physmem.wrQLenPdf::25 0 -system.physmem.wrQLenPdf::26 0 -system.physmem.wrQLenPdf::27 0 -system.physmem.wrQLenPdf::28 0 -system.physmem.wrQLenPdf::29 0 -system.physmem.wrQLenPdf::30 0 -system.physmem.wrQLenPdf::31 0 -system.physmem.wrQLenPdf::32 0 -system.physmem.wrQLenPdf::33 0 -system.physmem.wrQLenPdf::34 0 -system.physmem.wrQLenPdf::35 0 -system.physmem.wrQLenPdf::36 0 -system.physmem.wrQLenPdf::37 0 -system.physmem.wrQLenPdf::38 0 -system.physmem.wrQLenPdf::39 0 -system.physmem.wrQLenPdf::40 0 -system.physmem.wrQLenPdf::41 0 -system.physmem.wrQLenPdf::42 0 -system.physmem.wrQLenPdf::43 0 -system.physmem.wrQLenPdf::44 0 -system.physmem.wrQLenPdf::45 0 -system.physmem.wrQLenPdf::46 0 -system.physmem.wrQLenPdf::47 0 -system.physmem.wrQLenPdf::48 0 -system.physmem.wrQLenPdf::49 0 -system.physmem.wrQLenPdf::50 0 -system.physmem.wrQLenPdf::51 0 -system.physmem.wrQLenPdf::52 0 -system.physmem.wrQLenPdf::53 0 -system.physmem.wrQLenPdf::54 0 -system.physmem.wrQLenPdf::55 0 -system.physmem.wrQLenPdf::56 0 -system.physmem.wrQLenPdf::57 0 -system.physmem.wrQLenPdf::58 0 -system.physmem.wrQLenPdf::59 0 -system.physmem.wrQLenPdf::60 0 -system.physmem.wrQLenPdf::61 0 -system.physmem.wrQLenPdf::62 0 -system.physmem.wrQLenPdf::63 0 -system.physmem.bytesPerActivate::samples 202 -system.physmem.bytesPerActivate::mean 288.316832 -system.physmem.bytesPerActivate::gmean 177.342258 -system.physmem.bytesPerActivate::stdev 298.023303 -system.physmem.bytesPerActivate::0-127 71 35.15% 35.15% -system.physmem.bytesPerActivate::128-255 55 27.23% 62.38% -system.physmem.bytesPerActivate::256-383 17 8.42% 70.79% -system.physmem.bytesPerActivate::384-511 14 6.93% 77.72% -system.physmem.bytesPerActivate::512-639 12 5.94% 83.66% -system.physmem.bytesPerActivate::640-767 6 2.97% 86.63% -system.physmem.bytesPerActivate::768-895 9 4.46% 91.09% -system.physmem.bytesPerActivate::896-1023 5 2.48% 93.56% -system.physmem.bytesPerActivate::1024-1151 13 6.44% 100.00% -system.physmem.bytesPerActivate::total 202 -system.physmem.totQLat 16137750 -system.physmem.totMemAccLat 34194000 -system.physmem.totBusLat 4815000 -system.physmem.avgQLat 16757.79 -system.physmem.avgBusLat 5000.00 -system.physmem.avgMemAccLat 35507.79 -system.physmem.avgRdBW 2272.78 -system.physmem.avgWrBW 0.00 -system.physmem.avgRdBWSys 2272.78 -system.physmem.avgWrBWSys 0.00 -system.physmem.peakBW 12800.00 -system.physmem.busUtil 17.76 -system.physmem.busUtilRead 17.76 -system.physmem.busUtilWrite 0.00 -system.physmem.avgRdQLen 2.46 -system.physmem.avgWrQLen 0.00 -system.physmem.readRowHits 750 -system.physmem.writeRowHits 0 -system.physmem.readRowHitRate 77.88 -system.physmem.writeRowHitRate nan -system.physmem.avgGap 28127.21 -system.physmem.pageHitRate 77.88 -system.physmem_0.actEnergy 835380 -system.physmem_0.preEnergy 428835 -system.physmem_0.readEnergy 4162620 -system.physmem_0.writeEnergy 0 -system.physmem_0.refreshEnergy 1843920.000000 -system.physmem_0.actBackEnergy 5930850 -system.physmem_0.preBackEnergy 47520 -system.physmem_0.actPowerDownEnergy 6376590 -system.physmem_0.prePowerDownEnergy 1440 -system.physmem_0.selfRefreshEnergy 0 -system.physmem_0.totalEnergy 19627155 -system.physmem_0.averagePower 723.781875 -system.physmem_0.totalIdleTime 13833750 -system.physmem_0.memoryStateTime::IDLE 40500 -system.physmem_0.memoryStateTime::REF 780000 -system.physmem_0.memoryStateTime::SREF 0 -system.physmem_0.memoryStateTime::PRE_PDN 3750 -system.physmem_0.memoryStateTime::ACT 12310750 -system.physmem_0.memoryStateTime::ACT_PDN 13982500 -system.physmem_1.actEnergy 685440 -system.physmem_1.preEnergy 337755 -system.physmem_1.readEnergy 2713200 -system.physmem_1.writeEnergy 0 -system.physmem_1.refreshEnergy 1843920.000000 -system.physmem_1.actBackEnergy 4668300 -system.physmem_1.preBackEnergy 160320 -system.physmem_1.actPowerDownEnergy 7500060 -system.physmem_1.prePowerDownEnergy 5760 -system.physmem_1.selfRefreshEnergy 0 -system.physmem_1.totalEnergy 17914755 -system.physmem_1.averagePower 660.634461 -system.physmem_1.totalIdleTime 16457500 -system.physmem_1.memoryStateTime::IDLE 306000 -system.physmem_1.memoryStateTime::REF 780000 -system.physmem_1.memoryStateTime::SREF 0 -system.physmem_1.memoryStateTime::PRE_PDN 15250 -system.physmem_1.memoryStateTime::ACT 9574000 -system.physmem_1.memoryStateTime::ACT_PDN 16442250 -system.pwrStateResidencyTicks::UNDEFINED 27117500 -system.cpu.branchPred.lookups 5015 -system.cpu.branchPred.condPredicted 3001 -system.cpu.branchPred.condIncorrect 806 -system.cpu.branchPred.BTBLookups 3809 -system.cpu.branchPred.BTBHits 1166 -system.cpu.branchPred.BTBCorrect 0 -system.cpu.branchPred.BTBHitPct 30.611709 -system.cpu.branchPred.usedRAS 698 -system.cpu.branchPred.RASInCorrect 53 -system.cpu.branchPred.indirectLookups 824 -system.cpu.branchPred.indirectHits 156 -system.cpu.branchPred.indirectMisses 668 -system.cpu.branchPredindirectMispredicted 131 -system.cpu_clk_domain.clock 500 -system.cpu.dtb.fetch_hits 0 -system.cpu.dtb.fetch_misses 0 -system.cpu.dtb.fetch_acv 0 -system.cpu.dtb.fetch_accesses 0 -system.cpu.dtb.read_hits 4101 -system.cpu.dtb.read_misses 90 -system.cpu.dtb.read_acv 0 -system.cpu.dtb.read_accesses 4191 -system.cpu.dtb.write_hits 1999 -system.cpu.dtb.write_misses 49 -system.cpu.dtb.write_acv 0 -system.cpu.dtb.write_accesses 2048 -system.cpu.dtb.data_hits 6100 -system.cpu.dtb.data_misses 139 -system.cpu.dtb.data_acv 0 -system.cpu.dtb.data_accesses 6239 -system.cpu.itb.fetch_hits 3896 -system.cpu.itb.fetch_misses 51 -system.cpu.itb.fetch_acv 0 -system.cpu.itb.fetch_accesses 3947 -system.cpu.itb.read_hits 0 -system.cpu.itb.read_misses 0 -system.cpu.itb.read_acv 0 -system.cpu.itb.read_accesses 0 -system.cpu.itb.write_hits 0 -system.cpu.itb.write_misses 0 -system.cpu.itb.write_acv 0 -system.cpu.itb.write_accesses 0 -system.cpu.itb.data_hits 0 -system.cpu.itb.data_misses 0 -system.cpu.itb.data_acv 0 -system.cpu.itb.data_accesses 0 -system.cpu.workload0.numSyscalls 17 -system.cpu.workload1.numSyscalls 17 -system.cpu.pwrStateResidencyTicks::ON 27117500 -system.cpu.numCycles 54236 -system.cpu.numWorkItemsStarted 0 -system.cpu.numWorkItemsCompleted 0 -system.cpu.fetch.icacheStallCycles 769 -system.cpu.fetch.Insts 28725 -system.cpu.fetch.Branches 5015 -system.cpu.fetch.predictedBranches 2020 -system.cpu.fetch.Cycles 9652 -system.cpu.fetch.SquashCycles 886 -system.cpu.fetch.MiscStallCycles 340 -system.cpu.fetch.CacheLines 3896 -system.cpu.fetch.IcacheSquashes 581 -system.cpu.fetch.rateDist::samples 26268 -system.cpu.fetch.rateDist::mean 1.093536 -system.cpu.fetch.rateDist::stdev 2.491751 -system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% -system.cpu.fetch.rateDist::0 21148 80.51% 80.51% -system.cpu.fetch.rateDist::1 495 1.88% 82.39% -system.cpu.fetch.rateDist::2 401 1.53% 83.92% -system.cpu.fetch.rateDist::3 445 1.69% 85.61% -system.cpu.fetch.rateDist::4 462 1.76% 87.37% -system.cpu.fetch.rateDist::5 360 1.37% 88.74% -system.cpu.fetch.rateDist::6 460 1.75% 90.49% -system.cpu.fetch.rateDist::7 291 1.11% 91.60% -system.cpu.fetch.rateDist::8 2206 8.40% 100.00% -system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% -system.cpu.fetch.rateDist::min_value 0 -system.cpu.fetch.rateDist::max_value 8 -system.cpu.fetch.rateDist::total 26268 -system.cpu.fetch.branchRate 0.092466 -system.cpu.fetch.rate 0.529630 -system.cpu.decode.IdleCycles 36232 -system.cpu.decode.BlockedCycles 10559 -system.cpu.decode.RunCycles 4004 -system.cpu.decode.UnblockCycles 499 -system.cpu.decode.SquashCycles 740 -system.cpu.decode.BranchResolved 1233 -system.cpu.decode.BranchMispred 150 -system.cpu.decode.DecodedInsts 24986 -system.cpu.decode.SquashedInsts 353 -system.cpu.rename.SquashCycles 740 -system.cpu.rename.IdleCycles 36582 -system.cpu.rename.BlockCycles 3853 -system.cpu.rename.serializeStallCycles 1413 -system.cpu.rename.RunCycles 4167 -system.cpu.rename.UnblockCycles 5279 -system.cpu.rename.RenamedInsts 23947 -system.cpu.rename.ROBFullEvents 27 -system.cpu.rename.IQFullEvents 237 -system.cpu.rename.LQFullEvents 333 -system.cpu.rename.SQFullEvents 4524 -system.cpu.rename.RenamedOperands 17933 -system.cpu.rename.RenameLookups 29997 -system.cpu.rename.int_rename_lookups 29979 -system.cpu.rename.fp_rename_lookups 16 -system.cpu.rename.CommittedMaps 9154 -system.cpu.rename.UndoneMaps 8779 -system.cpu.rename.serializingInsts 57 -system.cpu.rename.tempSerializingInsts 45 -system.cpu.rename.skidInsts 1716 -system.cpu.memDep0.insertedLoads 1914 -system.cpu.memDep0.insertedStores 1068 -system.cpu.memDep0.conflictingLoads 6 -system.cpu.memDep0.conflictingStores 0 -system.cpu.memDep1.insertedLoads 2644 -system.cpu.memDep1.insertedStores 1299 -system.cpu.memDep1.conflictingLoads 14 -system.cpu.memDep1.conflictingStores 4 -system.cpu.iq.iqInstsAdded 22142 -system.cpu.iq.iqNonSpecInstsAdded 52 -system.cpu.iq.iqInstsIssued 19454 -system.cpu.iq.iqSquashedInstsIssued 57 -system.cpu.iq.iqSquashedInstsExamined 9423 -system.cpu.iq.iqSquashedOperandsExamined 4923 -system.cpu.iq.iqSquashedNonSpecRemoved 18 -system.cpu.iq.issued_per_cycle::samples 26268 -system.cpu.iq.issued_per_cycle::mean 0.740597 -system.cpu.iq.issued_per_cycle::stdev 1.454117 -system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% -system.cpu.iq.issued_per_cycle::0 18898 71.94% 71.94% -system.cpu.iq.issued_per_cycle::1 2350 8.95% 80.89% -system.cpu.iq.issued_per_cycle::2 1639 6.24% 87.13% -system.cpu.iq.issued_per_cycle::3 1288 4.90% 92.03% -system.cpu.iq.issued_per_cycle::4 1107 4.21% 96.25% -system.cpu.iq.issued_per_cycle::5 560 2.13% 98.38% -system.cpu.iq.issued_per_cycle::6 292 1.11% 99.49% -system.cpu.iq.issued_per_cycle::7 90 0.34% 99.83% -system.cpu.iq.issued_per_cycle::8 44 0.17% 100.00% -system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% -system.cpu.iq.issued_per_cycle::min_value 0 -system.cpu.iq.issued_per_cycle::max_value 8 -system.cpu.iq.issued_per_cycle::total 26268 -system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% -system.cpu.iq.fu_full::IntAlu 27 9.18% 9.18% -system.cpu.iq.fu_full::IntMult 0 0.00% 9.18% -system.cpu.iq.fu_full::IntDiv 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatAdd 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatCmp 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatCvt 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatMult 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatDiv 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatMisc 0 0.00% 9.18% -system.cpu.iq.fu_full::FloatSqrt 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdAdd 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdAlu 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdCmp 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdCvt 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdMisc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdMult 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdShift 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdSqrt 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 9.18% -system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 9.18% -system.cpu.iq.fu_full::MemRead 190 64.63% 73.81% -system.cpu.iq.fu_full::MemWrite 74 25.17% 98.98% -system.cpu.iq.fu_full::FloatMemRead 0 0.00% 98.98% -system.cpu.iq.fu_full::FloatMemWrite 3 1.02% 100.00% -system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% -system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% -system.cpu.iq.FU_type_0::No_OpClass 2 0.02% 0.02% -system.cpu.iq.FU_type_0::IntAlu 5807 66.00% 66.02% -system.cpu.iq.FU_type_0::IntMult 1 0.01% 66.03% -system.cpu.iq.FU_type_0::IntDiv 0 0.00% 66.03% -system.cpu.iq.FU_type_0::FloatAdd 2 0.02% 66.05% -system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdMult 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdShift 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.05% -system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.05% 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-system.cpu.iq.FU_type_1::FloatCmp 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatCvt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatMult 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatMultAcc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatDiv 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatMisc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::FloatSqrt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdAdd 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdAddAcc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdAlu 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdCmp 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdCvt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdMisc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdMult 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdMultAcc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdShift 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdShiftAcc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdSqrt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatAdd 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatAlu 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatCmp 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatCvt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatDiv 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatMisc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatMult 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatMultAcc 0 0.00% 66.67% -system.cpu.iq.FU_type_1::SimdFloatSqrt 0 0.00% 66.67% -system.cpu.iq.FU_type_1::MemRead 2427 22.78% 89.45% -system.cpu.iq.FU_type_1::MemWrite 1116 10.47% 99.92% -system.cpu.iq.FU_type_1::FloatMemRead 1 0.01% 99.93% -system.cpu.iq.FU_type_1::FloatMemWrite 7 0.07% 100.00% -system.cpu.iq.FU_type_1::IprAccess 0 0.00% 100.00% -system.cpu.iq.FU_type_1::InstPrefetch 0 0.00% 100.00% -system.cpu.iq.FU_type_1::total 10655 -system.cpu.iq.FU_type::total 19454 0.00% 0.00% -system.cpu.iq.rate 0.358692 -system.cpu.iq.fu_busy_cnt::0 148 -system.cpu.iq.fu_busy_cnt::1 146 -system.cpu.iq.fu_busy_cnt::total 294 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-system.cpu.commit.committed_per_cycle::3 381 1.45% 95.53% -system.cpu.commit.committed_per_cycle::4 266 1.01% 96.54% -system.cpu.commit.committed_per_cycle::5 163 0.62% 97.16% -system.cpu.commit.committed_per_cycle::6 223 0.85% 98.01% -system.cpu.commit.committed_per_cycle::7 120 0.46% 98.47% -system.cpu.commit.committed_per_cycle::8 402 1.53% 100.00% -system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% -system.cpu.commit.committed_per_cycle::min_value 0 -system.cpu.commit.committed_per_cycle::max_value 8 -system.cpu.commit.committed_per_cycle::total 26245 -system.cpu.commit.committedInsts::0 6402 -system.cpu.commit.committedInsts::1 6402 -system.cpu.commit.committedInsts::total 12804 -system.cpu.commit.committedOps::0 6402 -system.cpu.commit.committedOps::1 6402 -system.cpu.commit.committedOps::total 12804 -system.cpu.commit.swp_count::0 0 -system.cpu.commit.swp_count::1 0 -system.cpu.commit.swp_count::total 0 -system.cpu.commit.refs::0 2050 -system.cpu.commit.refs::1 2050 -system.cpu.commit.refs::total 4100 -system.cpu.commit.loads::0 1185 -system.cpu.commit.loads::1 1185 -system.cpu.commit.loads::total 2370 -system.cpu.commit.membars::0 0 -system.cpu.commit.membars::1 0 -system.cpu.commit.membars::total 0 -system.cpu.commit.branches::0 1056 -system.cpu.commit.branches::1 1056 -system.cpu.commit.branches::total 2112 -system.cpu.commit.fp_insts::0 10 -system.cpu.commit.fp_insts::1 10 -system.cpu.commit.fp_insts::total 20 -system.cpu.commit.int_insts::0 6319 -system.cpu.commit.int_insts::1 6319 -system.cpu.commit.int_insts::total 12638 -system.cpu.commit.function_calls::0 127 -system.cpu.commit.function_calls::1 127 -system.cpu.commit.function_calls::total 254 -system.cpu.commit.op_class_0::No_OpClass 19 0.30% 0.30% -system.cpu.commit.op_class_0::IntAlu 4330 67.64% 67.93% -system.cpu.commit.op_class_0::IntMult 1 0.02% 67.95% -system.cpu.commit.op_class_0::IntDiv 0 0.00% 67.95% -system.cpu.commit.op_class_0::FloatAdd 2 0.03% 67.98% -system.cpu.commit.op_class_0::FloatCmp 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatCvt 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatMult 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatDiv 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatMisc 0 0.00% 67.98% -system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdAdd 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdAlu 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdCmp 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdCvt 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdMisc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdMult 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdMultAcc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdShift 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdShiftAcc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdSqrt 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatAdd 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 67.98% -system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 67.98% -system.cpu.commit.op_class_0::MemRead 1184 18.49% 86.47% -system.cpu.commit.op_class_0::MemWrite 858 13.40% 99.88% -system.cpu.commit.op_class_0::FloatMemRead 1 0.02% 99.89% -system.cpu.commit.op_class_0::FloatMemWrite 7 0.11% 100.00% -system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% -system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% -system.cpu.commit.op_class_0::total 6402 -system.cpu.commit.op_class_1::No_OpClass 19 0.30% 0.30% -system.cpu.commit.op_class_1::IntAlu 4330 67.64% 67.93% -system.cpu.commit.op_class_1::IntMult 1 0.02% 67.95% -system.cpu.commit.op_class_1::IntDiv 0 0.00% 67.95% -system.cpu.commit.op_class_1::FloatAdd 2 0.03% 67.98% -system.cpu.commit.op_class_1::FloatCmp 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatCvt 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatMult 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatMultAcc 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatDiv 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatMisc 0 0.00% 67.98% -system.cpu.commit.op_class_1::FloatSqrt 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdAdd 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdAddAcc 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdAlu 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdCmp 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdCvt 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdMisc 0 0.00% 67.98% -system.cpu.commit.op_class_1::SimdMult 0 0.00% 67.98% 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-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 73938.356164 -system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 75731.451613 -system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 75731.451613 -system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 81505.076142 -system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 81505.076142 -system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 75731.451613 -system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 78284.256560 -system.cpu.l2cache.demand_avg_mshr_miss_latency::total 76640.706127 -system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 75731.451613 -system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 78284.256560 -system.cpu.l2cache.overall_avg_mshr_miss_latency::total 76640.706127 -system.cpu.toL2Bus.snoop_filter.tot_requests 973 -system.cpu.toL2Bus.snoop_filter.hit_single_requests 9 -system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 -system.cpu.toL2Bus.snoop_filter.tot_snoops 0 -system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 -system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 -system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 27117500 -system.cpu.toL2Bus.trans_dist::ReadResp 819 -system.cpu.toL2Bus.trans_dist::WritebackClean 7 -system.cpu.toL2Bus.trans_dist::ReadExReq 146 -system.cpu.toL2Bus.trans_dist::ReadExResp 146 -system.cpu.toL2Bus.trans_dist::ReadCleanReq 623 -system.cpu.toL2Bus.trans_dist::ReadSharedReq 197 -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1253 -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 685 -system.cpu.toL2Bus.pkt_count::total 1938 -system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 40320 -system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 21888 -system.cpu.toL2Bus.pkt_size::total 62208 -system.cpu.toL2Bus.snoops 0 -system.cpu.toL2Bus.snoopTraffic 0 -system.cpu.toL2Bus.snoop_fanout::samples 966 -system.cpu.toL2Bus.snoop_fanout::mean 0.002070 -system.cpu.toL2Bus.snoop_fanout::stdev 0.045478 -system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% -system.cpu.toL2Bus.snoop_fanout::0 964 99.79% 99.79% -system.cpu.toL2Bus.snoop_fanout::1 2 0.21% 100.00% -system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% -system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% -system.cpu.toL2Bus.snoop_fanout::min_value 0 -system.cpu.toL2Bus.snoop_fanout::max_value 1 -system.cpu.toL2Bus.snoop_fanout::total 966 -system.cpu.toL2Bus.reqLayer0.occupancy 493500 -system.cpu.toL2Bus.reqLayer0.utilization 1.8 -system.cpu.toL2Bus.respLayer0.occupancy 934500 -system.cpu.toL2Bus.respLayer0.utilization 3.4 -system.cpu.toL2Bus.respLayer1.occupancy 513000 -system.cpu.toL2Bus.respLayer1.utilization 1.9 -system.membus.snoop_filter.tot_requests 963 -system.membus.snoop_filter.hit_single_requests 0 -system.membus.snoop_filter.hit_multi_requests 0 -system.membus.snoop_filter.tot_snoops 0 -system.membus.snoop_filter.hit_single_snoops 0 -system.membus.snoop_filter.hit_multi_snoops 0 -system.membus.pwrStateResidencyTicks::UNDEFINED 27117500 -system.membus.trans_dist::ReadResp 816 -system.membus.trans_dist::ReadExReq 146 -system.membus.trans_dist::ReadExResp 146 -system.membus.trans_dist::ReadSharedReq 817 -system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1925 -system.membus.pkt_count::total 1925 -system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 61568 -system.membus.pkt_size::total 61568 -system.membus.snoops 0 -system.membus.snoopTraffic 0 -system.membus.snoop_fanout::samples 963 -system.membus.snoop_fanout::mean 0 -system.membus.snoop_fanout::stdev 0 -system.membus.snoop_fanout::underflows 0 0.00% 0.00% -system.membus.snoop_fanout::0 963 100.00% 100.00% -system.membus.snoop_fanout::1 0 0.00% 100.00% -system.membus.snoop_fanout::overflows 0 0.00% 100.00% -system.membus.snoop_fanout::min_value 0 -system.membus.snoop_fanout::max_value 0 -system.membus.snoop_fanout::total 963 -system.membus.reqLayer0.occupancy 1169500 -system.membus.reqLayer0.utilization 4.3 -system.membus.respLayer1.occupancy 5110750 -system.membus.respLayer1.utilization 18.8 - ----------- End Simulation Statistics ---------- |