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-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt45
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
index fd07afc4b..33f452573 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000008 # Nu
sim_ticks 7612000 # Number of ticks simulated
final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 30038 # Simulator instruction rate (inst/s)
-host_op_rate 30037 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 15079139 # Simulator tick rate (ticks/s)
-host_mem_usage 275464 # Number of bytes of host memory used
-host_seconds 0.51 # Real time elapsed on the host
+host_inst_rate 945144 # Simulator instruction rate (inst/s)
+host_op_rate 944261 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 473677660 # Simulator tick rate (ticks/s)
+host_mem_usage 260980 # Number of bytes of host memory used
+host_seconds 0.02 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -65,5 +65,40 @@ system.cpu.num_busy_cycles 15225 # Nu
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.Branches 3363 # Number of branches fetched
+system.cpu.op_class::No_OpClass 726 4.77% 4.77% # Class of executed instruction
+system.cpu.op_class::IntAlu 10798 71.01% 75.78% # Class of executed instruction
+system.cpu.op_class::IntMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::IntDiv 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatAdd 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatCmp 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatCvt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatDiv 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatSqrt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdAdd 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdAlu 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdCmp 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdCvt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdMisc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdShift 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdSqrt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::MemRead 2231 14.67% 90.45% # Class of executed instruction
+system.cpu.op_class::MemWrite 1452 9.55% 100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::total 15207 # Class of executed instruction
---------- End Simulation Statistics ----------