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-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini43
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini17
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini20
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini18
4 files changed, 81 insertions, 17 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini
index a5a69d897..d6d7e175a 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini
@@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
@@ -36,7 +38,9 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -78,6 +82,7 @@ numThreads=1
profile=0
progress_interval=0
simpoint_start_insts=
+socket_id=0
stageTracing=false
stageWidth=4
switched_out=false
@@ -252,7 +257,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/insttest/bin/sparc/linux/insttest
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
max_stack_size=67108864
@@ -266,9 +271,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
@@ -281,9 +296,9 @@ master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=SimpleDRAM
+type=DRAMCtrl
activation_limit=4
-addr_mapping=RaBaChCo
+addr_mapping=RoRaBaChCo
banks_per_rank=8
burst_length=8
channels=1
@@ -294,27 +309,33 @@ device_rowbuffer_size=1024
devices_per_rank=8
eventq_index=0
in_addr_map=true
+max_accesses_per_row=16
mem_sched_policy=frfcfs
+min_writes_per_switch=16
null=false
-page_policy=open
+page_policy=open_adaptive
range=0:134217727
ranks_per_channel=2
read_buffer_size=32
static_backend_latency=10000
static_frontend_latency=10000
tBURST=5000
+tCK=1250
tCL=13750
tRAS=35000
tRCD=13750
tREFI=7800000
-tRFC=300000
+tRFC=260000
tRP=13750
-tRRD=6250
+tRRD=6000
+tRTP=7500
+tRTW=2500
+tWR=15000
tWTR=7500
-tXAW=40000
-write_buffer_size=32
-write_high_thresh_perc=70
-write_low_thresh_perc=0
+tXAW=30000
+write_buffer_size=64
+write_high_thresh_perc=85
+write_low_thresh_perc=50
port=system.membus.master[0]
[system.voltage_domain]
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
index 17eb8fa43..2560e1b90 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -37,7 +38,9 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -600,7 +603,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
max_stack_size=67108864
@@ -614,9 +617,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
index 4f177ecd0..a0349a47c 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
@@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
+load_offset=0
mem_mode=atomic
mem_ranges=
memories=system.physmem
@@ -36,12 +38,15 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
type=AtomicSimpleCPU
children=dtb interrupts isa itb tracer workload
+branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
@@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
+socket_id=0
switched_out=false
system=system
tracer=system.cpu.tracer
@@ -108,7 +114,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/insttest/bin/sparc/linux/insttest
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
max_stack_size=67108864
@@ -122,9 +128,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
index 56f586dca..0cf6b950c 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -37,7 +38,9 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -65,6 +68,7 @@ numThreads=1
profile=0
progress_interval=0
simpoint_start_insts=
+socket_id=0
switched_out=false
system=system
tracer=system.cpu.tracer
@@ -219,7 +223,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=tests/test-progs/insttest/bin/sparc/linux/insttest
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
max_stack_size=67108864
@@ -233,9 +237,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain