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-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini17
-rwxr-xr-xtests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout12
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt10
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini1
-rwxr-xr-xtests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout11
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini17
-rwxr-xr-xtests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout13
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt10
8 files changed, 65 insertions, 26 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
index fcd535567..a29568e42 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -24,6 +24,7 @@ mem_mode=timing
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
@@ -155,6 +156,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -171,6 +173,7 @@ system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
@@ -502,6 +505,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -518,6 +522,7 @@ system=system
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
@@ -550,6 +555,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -566,6 +572,7 @@ system=system
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
@@ -581,12 +588,13 @@ size=2097152
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
@@ -594,6 +602,13 @@ width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
index 81d821c63..24428b019 100755
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 08:08:31
-gem5 started Apr 22 2015 08:14:03
-gem5 executing on phenom
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:27
+gem5 executing on ribera.cs.wisc.edu, pid 7788
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@@ -19,4 +21,4 @@ LDTX: Passed
LDTW: Passed
STTW: Passed
Done
-Exiting @ tick 27482500 because target called exit()
+Exiting @ tick 26944000 because target called exit()
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index 44f64cb89..23a543cb5 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000027 # Nu
sim_ticks 26944000 # Number of ticks simulated
final_tick 26944000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 77815 # Simulator instruction rate (inst/s)
-host_op_rate 77809 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 145216229 # Simulator tick rate (ticks/s)
-host_mem_usage 294808 # Number of bytes of host memory used
-host_seconds 0.19 # Real time elapsed on the host
+host_inst_rate 19173 # Simulator instruction rate (inst/s)
+host_op_rate 19172 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 35783272 # Simulator tick rate (ticks/s)
+host_mem_usage 289736 # Number of bytes of host memory used
+host_seconds 0.75 # Real time elapsed on the host
sim_insts 14436 # Number of instructions simulated
sim_ops 14436 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
index 03bf761da..4c5660e8d 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
@@ -24,6 +24,7 @@ mem_mode=atomic
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout
index 13e87da70..ccd391193 100755
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout
@@ -1,10 +1,13 @@
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 17:29:44
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:23
+gem5 executing on ribera.cs.wisc.edu, pid 7778
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
index 76cf5023d..c2fdc0a46 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -24,6 +24,7 @@ mem_mode=timing
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
@@ -83,6 +84,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -99,6 +101,7 @@ system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
@@ -123,6 +126,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -139,6 +143,7 @@ system=system
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
@@ -171,6 +176,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -187,6 +193,7 @@ system=system
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
@@ -202,12 +209,13 @@ size=2097152
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
@@ -215,6 +223,13 @@ width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout
index 543b5de56..b8566a486 100755
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout
@@ -1,10 +1,13 @@
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 17:29:44
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:11
+gem5 executing on ribera.cs.wisc.edu, pid 7750
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
@@ -18,4 +21,4 @@ LDTX: Passed
LDTW: Passed
STTW: Passed
Done
-Exiting @ tick 41368000 because target called exit()
+Exiting @ tick 44282500 because target called exit()
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
index 1f4758d3f..54a798052 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000044 # Nu
sim_ticks 44282500 # Number of ticks simulated
final_tick 44282500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 498046 # Simulator instruction rate (inst/s)
-host_op_rate 497817 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1453362434 # Simulator tick rate (ticks/s)
-host_mem_usage 292760 # Number of bytes of host memory used
-host_seconds 0.03 # Real time elapsed on the host
+host_inst_rate 18923 # Simulator instruction rate (inst/s)
+host_op_rate 18923 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 55265287 # Simulator tick rate (ticks/s)
+host_mem_usage 287684 # Number of bytes of host memory used
+host_seconds 0.80 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts