1 files changed, 55 insertions, 0 deletions
diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index 40d27177c..08ecd7e06 100644
--- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -14,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domai
 boot_osflags=a
 cache_line_size=64
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 exit_on_work_items=false
 init_param=0
@@ -27,6 +28,10 @@ memories=system.physmem
 mmap_using_noreserve=false
 multi_thread=false
 num_work_ids=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 readfile=
 symbolfile=
 thermal_components=
@@ -55,6 +60,7 @@ branchPred=Null
 checker=Null
 clk_domain=system.cpu_clk_domain
 cpu_id=0
+default_p_state=UNDEFINED
 do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
@@ -70,6 +76,10 @@ max_insts_any_thread=500000
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 profile=0
 progress_interval=0
 simpoint_start_insts=
@@ -88,12 +98,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
 hit_latency=2
 is_read_only=false
 max_miss_count=0
 mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -112,8 +127,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=262144
 
@@ -129,12 +149,17 @@ addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
 hit_latency=2
 is_read_only=true
 max_miss_count=0
 mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -153,8 +178,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=131072
 
@@ -179,12 +209,17 @@ addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
 clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
 hit_latency=20
 is_read_only=false
 max_miss_count=0
 mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
@@ -203,8 +238,13 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=2097152
 
@@ -212,10 +252,15 @@ size=2097152
 type=CoherentXBar
 children=snoop_filter
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=0
 frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 point_of_coherency=false
+power_model=Null
 response_latency=1
 snoop_filter=system.cpu.toL2Bus.snoop_filter
 snoop_response_latency=1
@@ -268,10 +313,15 @@ transition_latency=100000000
 [system.membus]
 type=CoherentXBar
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=4
 frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 point_of_coherency=true
+power_model=Null
 response_latency=2
 snoop_filter=Null
 snoop_response_latency=4
@@ -286,11 +336,16 @@ type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+default_p_state=UNDEFINED
 eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 range=0:134217727
 port=system.membus.master[0]