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-rw-r--r--tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt45
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
index 874d16910..b7fd6736b 100644
--- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
+++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000727 # Nu
sim_ticks 727072000 # Number of ticks simulated
final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1056088 # Simulator instruction rate (inst/s)
-host_op_rate 1056045 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1535580911 # Simulator tick rate (ticks/s)
-host_mem_usage 276676 # Number of bytes of host memory used
-host_seconds 0.47 # Real time elapsed on the host
+host_inst_rate 1291108 # Simulator instruction rate (inst/s)
+host_op_rate 1291046 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1877262486 # Simulator tick rate (ticks/s)
+host_mem_usage 229624 # Number of bytes of host memory used
+host_seconds 0.39 # Real time elapsed on the host
sim_insts 500001 # Number of instructions simulated
sim_ops 500001 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -101,6 +101,41 @@ system.cpu.num_busy_cycles 1454144 # Nu
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.Branches 59023 # Number of branches fetched
+system.cpu.op_class::No_OpClass 18814 3.76% 3.76% # Class of executed instruction
+system.cpu.op_class::IntAlu 300388 60.08% 63.84% # Class of executed instruction
+system.cpu.op_class::IntMult 10 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::IntDiv 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatAdd 10 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatCmp 2 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatCvt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatMult 2 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatDiv 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::FloatSqrt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdAdd 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdAlu 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdCmp 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdCvt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdMisc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdMult 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdShift 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdSqrt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 63.84% # Class of executed instruction
+system.cpu.op_class::MemRead 124443 24.89% 88.73% # Class of executed instruction
+system.cpu.op_class::MemWrite 56350 11.27% 100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::total 500019 # Class of executed instruction
system.cpu.icache.tags.replacements 0 # number of replacements
system.cpu.icache.tags.tagsinuse 265.013024 # Cycle average of tags in use
system.cpu.icache.tags.total_refs 499617 # Total number of references to valid blocks.