summaryrefslogtreecommitdiff
path: root/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing')
-rw-r--r--tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini1
-rwxr-xr-xtests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout6
2 files changed, 4 insertions, 3 deletions
diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index c06c84e34..d9ac6433c 100644
--- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain
[system.cpu]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout
index fa0029313..f1715e087 100755
--- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout
+++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout
@@ -1,8 +1,10 @@
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 24 2013 11:53:30
-gem5 started Aug 24 2013 12:01:38
+gem5 compiled Sep 24 2013 03:08:53
+gem5 started Sep 28 2013 03:05:39
gem5 executing on zizzer
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
Global frequency set at 1000000000000 ticks per second