summaryrefslogtreecommitdiff
path: root/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini')
-rw-r--r--tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini18
1 files changed, 12 insertions, 6 deletions
diff --git a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
index e4dca8242..0679aa6bf 100644
--- a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
+++ b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
@@ -174,11 +174,12 @@ type=EioProcess
chkpt=
errout=cerr
eventq_index=0
-file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
system=system
+useArchPT=false
[system.cpu1]
type=TimingSimpleCPU
@@ -311,11 +312,12 @@ type=EioProcess
chkpt=
errout=cerr
eventq_index=0
-file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
system=system
+useArchPT=false
[system.cpu2]
type=TimingSimpleCPU
@@ -448,11 +450,12 @@ type=EioProcess
chkpt=
errout=cerr
eventq_index=0
-file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
system=system
+useArchPT=false
[system.cpu3]
type=TimingSimpleCPU
@@ -585,11 +588,12 @@ type=EioProcess
chkpt=
errout=cerr
eventq_index=0
-file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
system=system
+useArchPT=false
[system.cpu_clk_domain]
type=SrcClockDomain
@@ -643,10 +647,11 @@ sequential_access=false
size=4194304
[system.membus]
-type=CoherentBus
+type=CoherentXBar
clk_domain=system.clk_domain
eventq_index=0
header_cycles=1
+snoop_filter=Null
system=system
use_default_range=false
width=8
@@ -667,10 +672,11 @@ range=0:134217727
port=system.membus.master[0]
[system.toL2Bus]
-type=CoherentBus
+type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
header_cycles=1
+snoop_filter=Null
system=system
use_default_range=false
width=8