diff options
Diffstat (limited to 'tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json')
| -rw-r--r-- | tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json | 58 |
1 files changed, 35 insertions, 23 deletions
diff --git a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json index c960fde35..81af59151 100644 --- a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json +++ b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.json @@ -65,13 +65,7 @@ "forward_snoops": true, "size": 4194304 }, - "voltage_domain": { - "eventq_index": 0, - "path": "system.voltage_domain", - "type": "VoltageDomain", - "name": "voltage_domain", - "cxx_class": "VoltageDomain" - }, + "kernel_addr_check": true, "physmem": { "latency": 3.0000000000000004e-08, "name": "physmem", @@ -94,13 +88,45 @@ "work_begin_ckpt_count": 0, "clk_domain": { "name": "clk_domain", - "clock": 1e-09, + "init_perf_level": 0, "eventq_index": 0, "cxx_class": "SrcClockDomain", "path": "system.clk_domain", - "type": "SrcClockDomain" + "type": "SrcClockDomain", + "domain_id": -1 }, "eventq_index": 0, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "transition_latency": 9.999999999999999e-05, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, + "work_end_exit_count": 0, + "type": "System", + "voltage_domain": { + "eventq_index": 0, + "path": "system.voltage_domain", + "type": "VoltageDomain", + "name": "voltage_domain", + "cxx_class": "VoltageDomain" + }, + "cache_line_size": 64, + "work_cpus_ckpt_count": 0, + "work_begin_exit_count": 0, + "path": "system", + "cpu_clk_domain": { + "name": "cpu_clk_domain", + "init_perf_level": 0, + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.cpu_clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, "toL2Bus": { "slave": { "peer": [ @@ -130,20 +156,6 @@ "type": "CoherentBus", "use_default_range": false }, - "work_end_exit_count": 0, - "type": "System", - "cache_line_size": 64, - "work_cpus_ckpt_count": 0, - "work_begin_exit_count": 0, - "path": "system", - "cpu_clk_domain": { - "name": "cpu_clk_domain", - "clock": 5e-10, - "eventq_index": 0, - "cxx_class": "SrcClockDomain", - "path": "system.cpu_clk_domain", - "type": "SrcClockDomain" - }, "mem_mode": "timing", "name": "system", "init_param": 0, |