diff options
Diffstat (limited to 'tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp')
3 files changed, 59 insertions, 52 deletions
diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini index 90b4c4184..a47e5e15d 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini @@ -16,7 +16,6 @@ load_addr_mask=1099511627775 mem_mode=atomic memories=system.physmem num_work_ids=16 -physmem=system.physmem readfile= symbolfile= work_begin_ckpt_count=0 @@ -26,7 +25,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[2] +system_port=system.membus.slave[1] [system.cpu0] type=AtomicSimpleCPU @@ -39,6 +38,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu0.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu0.interrupts @@ -62,7 +62,7 @@ icache_port=system.cpu0.icache.cpu_side [system.cpu0.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -83,7 +83,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.dcache_port -mem_side=system.toL2Bus.port[2] +mem_side=system.toL2Bus.slave[1] [system.cpu0.dtb] type=SparcTLB @@ -91,7 +91,7 @@ size=64 [system.cpu0.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -112,7 +112,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.icache_port -mem_side=system.toL2Bus.port[1] +mem_side=system.toL2Bus.slave[0] [system.cpu0.interrupts] type=SparcInterrupts @@ -154,6 +154,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu1.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu1.interrupts @@ -177,7 +178,7 @@ icache_port=system.cpu1.icache.cpu_side [system.cpu1.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -198,7 +199,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.dcache_port -mem_side=system.toL2Bus.port[4] +mem_side=system.toL2Bus.slave[3] [system.cpu1.dtb] type=SparcTLB @@ -206,7 +207,7 @@ size=64 [system.cpu1.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -227,7 +228,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.icache_port -mem_side=system.toL2Bus.port[3] +mem_side=system.toL2Bus.slave[2] [system.cpu1.interrupts] type=SparcInterrupts @@ -250,6 +251,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu2.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu2.interrupts @@ -273,7 +275,7 @@ icache_port=system.cpu2.icache.cpu_side [system.cpu2.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -294,7 +296,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu2.dcache_port -mem_side=system.toL2Bus.port[6] +mem_side=system.toL2Bus.slave[5] [system.cpu2.dtb] type=SparcTLB @@ -302,7 +304,7 @@ size=64 [system.cpu2.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -323,7 +325,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu2.icache_port -mem_side=system.toL2Bus.port[5] +mem_side=system.toL2Bus.slave[4] [system.cpu2.interrupts] type=SparcInterrupts @@ -346,6 +348,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu3.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu3.interrupts @@ -369,7 +372,7 @@ icache_port=system.cpu3.icache.cpu_side [system.cpu3.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -390,7 +393,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu3.dcache_port -mem_side=system.toL2Bus.port[8] +mem_side=system.toL2Bus.slave[7] [system.cpu3.dtb] type=SparcTLB @@ -398,7 +401,7 @@ size=64 [system.cpu3.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -419,7 +422,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu3.icache_port -mem_side=system.toL2Bus.port[7] +mem_side=system.toL2Bus.slave[6] [system.cpu3.interrupts] type=SparcInterrupts @@ -433,7 +436,7 @@ type=ExeTracer [system.l2c] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=8 block_size=64 forward_snoops=true @@ -453,8 +456,8 @@ tgts_per_mshr=16 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[0] +cpu_side=system.toL2Bus.master[0] +mem_side=system.membus.slave[0] [system.membus] type=Bus @@ -464,17 +467,20 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.mem_side system.physmem.port[0] system.system_port +master=system.physmem.port[0] +slave=system.l2c.mem_side system.system_port [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false range=0:1073741823 zero=false -port=system.membus.port[1] +port=system.membus.master[0] [system.toL2Bus] type=Bus @@ -484,5 +490,6 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side +master=system.l2c.cpu_side +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout index 4d44fa6f6..ab456df4c 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout @@ -1,10 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 11 2012 13:08:33 -gem5 started Feb 11 2012 13:55:56 -gem5 executing on zizzer -command line: build/SPARC/gem5.fast -d build/SPARC/tests/fast/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re tests/run.py build/SPARC/tests/fast/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp +gem5 compiled May 8 2012 15:05:42 +gem5 started May 8 2012 15:43:05 +gem5 executing on piton +command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Init done diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt index 71dd904a3..e871b4c6b 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000088 # Nu sim_ticks 87713500 # Number of ticks simulated final_tick 87713500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1664146 # Simulator instruction rate (inst/s) -host_op_rate 1664073 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 215483439 # Simulator tick rate (ticks/s) -host_mem_usage 1139232 # Number of bytes of host memory used -host_seconds 0.41 # Real time elapsed on the host +host_inst_rate 523852 # Simulator instruction rate (inst/s) +host_op_rate 523839 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 67834135 # Simulator tick rate (ticks/s) +host_mem_usage 1149444 # Number of bytes of host memory used +host_seconds 1.29 # Real time elapsed on the host sim_insts 677340 # Number of instructions simulated sim_ops 677340 # Number of ops (including micro ops) simulated system.physmem.bytes_read 35776 # Number of bytes read from this memory @@ -77,8 +77,8 @@ system.cpu0.icache.blocked_cycles::no_mshrs 0 # system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.icache.fast_writes 0 # number of fast writes performed system.cpu0.icache.cache_copies 0 # number of cache copies performed system.cpu0.icache.no_allocate_misses 0 # Number of misses that were no-allocate @@ -130,8 +130,8 @@ system.cpu0.dcache.blocked_cycles::no_mshrs 0 # system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.dcache.fast_writes 0 # number of fast writes performed system.cpu0.dcache.cache_copies 0 # number of cache copies performed system.cpu0.dcache.writebacks::writebacks 6 # number of writebacks @@ -193,8 +193,8 @@ system.cpu1.icache.blocked_cycles::no_mshrs 0 # system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.icache.fast_writes 0 # number of fast writes performed system.cpu1.icache.cache_copies 0 # number of cache copies performed system.cpu1.icache.no_allocate_misses 0 # Number of misses that were no-allocate @@ -246,8 +246,8 @@ system.cpu1.dcache.blocked_cycles::no_mshrs 0 # system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.dcache.fast_writes 0 # number of fast writes performed system.cpu1.dcache.cache_copies 0 # number of cache copies performed system.cpu1.dcache.writebacks::writebacks 1 # number of writebacks @@ -309,8 +309,8 @@ system.cpu2.icache.blocked_cycles::no_mshrs 0 # system.cpu2.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu2.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu2.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu2.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu2.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu2.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu2.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu2.icache.fast_writes 0 # number of fast writes performed system.cpu2.icache.cache_copies 0 # number of cache copies performed system.cpu2.icache.no_allocate_misses 0 # Number of misses that were no-allocate @@ -362,8 +362,8 @@ system.cpu2.dcache.blocked_cycles::no_mshrs 0 # system.cpu2.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu2.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu2.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu2.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu2.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu2.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu2.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu2.dcache.fast_writes 0 # number of fast writes performed system.cpu2.dcache.cache_copies 0 # number of cache copies performed system.cpu2.dcache.writebacks::writebacks 1 # number of writebacks @@ -425,8 +425,8 @@ system.cpu3.icache.blocked_cycles::no_mshrs 0 # system.cpu3.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu3.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu3.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu3.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu3.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu3.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu3.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu3.icache.fast_writes 0 # number of fast writes performed system.cpu3.icache.cache_copies 0 # number of cache copies performed system.cpu3.icache.no_allocate_misses 0 # Number of misses that were no-allocate @@ -478,8 +478,8 @@ system.cpu3.dcache.blocked_cycles::no_mshrs 0 # system.cpu3.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu3.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu3.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu3.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu3.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu3.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu3.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu3.dcache.fast_writes 0 # number of fast writes performed system.cpu3.dcache.cache_copies 0 # number of cache copies performed system.cpu3.dcache.writebacks::writebacks 1 # number of writebacks @@ -653,8 +653,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked system.l2c.blocked::no_targets 0 # number of cycles access was blocked -system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.l2c.fast_writes 0 # number of fast writes performed system.l2c.cache_copies 0 # number of cache copies performed system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate |