diff options
Diffstat (limited to 'tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp')
3 files changed, 66 insertions, 38 deletions
diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini index 413a26622..f73075e8c 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= @@ -83,6 +84,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -99,6 +101,7 @@ system=system tags=system.cpu0.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu0.dcache_port mem_side=system.toL2Bus.slave[1] @@ -123,6 +126,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -139,6 +143,7 @@ system=system tags=system.cpu0.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu0.icache_port mem_side=system.toL2Bus.slave[0] @@ -231,6 +236,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -247,6 +253,7 @@ system=system tags=system.cpu1.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu1.dcache_port mem_side=system.toL2Bus.slave[3] @@ -271,6 +278,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -287,6 +295,7 @@ system=system tags=system.cpu1.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu1.icache_port mem_side=system.toL2Bus.slave[2] @@ -356,6 +365,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -372,6 +382,7 @@ system=system tags=system.cpu2.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu2.dcache_port mem_side=system.toL2Bus.slave[5] @@ -396,6 +407,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -412,6 +424,7 @@ system=system tags=system.cpu2.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu2.icache_port mem_side=system.toL2Bus.slave[4] @@ -481,6 +494,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -497,6 +511,7 @@ system=system tags=system.cpu3.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu3.dcache_port mem_side=system.toL2Bus.slave[7] @@ -521,6 +536,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -537,6 +553,7 @@ system=system tags=system.cpu3.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu3.icache_port mem_side=system.toL2Bus.slave[6] @@ -589,6 +606,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -605,6 +623,7 @@ system=system tags=system.l2c.tags tgts_per_mshr=12 write_buffers=8 +writeback_clean=false cpu_side=system.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -648,12 +667,13 @@ port=system.membus.master[0] [system.toL2Bus] type=CoherentXBar +children=snoop_filter clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 response_latency=1 -snoop_filter=Null +snoop_filter=system.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false @@ -661,6 +681,13 @@ width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side +[system.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + [system.voltage_domain] type=VoltageDomain eventq_index=0 diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout index 357ae183e..2f00f0f6a 100755 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout @@ -3,26 +3,27 @@ Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sp gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 15 2014 16:11:41 -gem5 started Feb 15 2014 16:12:55 -gem5 executing on ribera.cs.wisc.edu -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp +gem5 compiled Nov 15 2015 15:07:43 +gem5 started Nov 15 2015 15:08:11 +gem5 executing on ribera.cs.wisc.edu, pid 7748 +command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Init done -[Iteration 1, Thread 1] Got lock -[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 1, Thread 2] Got lock -[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 1, Thread 2] Critical section done, previously next=0, now next=2 +[Iteration 1, Thread 1] Got lock +[Iteration 1, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 1, Thread 3] Got lock -[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3 Iteration 1 completed -[Iteration 2, Thread 2] Got lock -[Iteration 2, Thread 2] Critical section done, previously next=0, now next=2 -[Iteration 2, Thread 1] Got lock -[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 2, Thread 3] Got lock -[Iteration 2, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 2, Thread 1] Got lock +[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 2, Thread 2] Got lock +[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2 Iteration 2 completed [Iteration 3, Thread 1] Got lock [Iteration 3, Thread 1] Critical section done, previously next=0, now next=1 @@ -33,38 +34,38 @@ Iteration 2 completed Iteration 3 completed [Iteration 4, Thread 2] Got lock [Iteration 4, Thread 2] Critical section done, previously next=0, now next=2 -[Iteration 4, Thread 1] Got lock -[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 4, Thread 3] Got lock -[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 4, Thread 1] Got lock +[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1 Iteration 4 completed +[Iteration 5, Thread 3] Got lock +[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3 [Iteration 5, Thread 1] Got lock -[Iteration 5, Thread 1] Critical section done, previously next=0, now next=1 +[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1 [Iteration 5, Thread 2] Got lock [Iteration 5, Thread 2] Critical section done, previously next=1, now next=2 -[Iteration 5, Thread 3] Got lock -[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3 Iteration 5 completed -[Iteration 6, Thread 2] Got lock -[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2 [Iteration 6, Thread 1] Got lock -[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1 +[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1 +[Iteration 6, Thread 2] Got lock +[Iteration 6, Thread 2] Critical section done, previously next=1, now next=2 [Iteration 6, Thread 3] Got lock -[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3 Iteration 6 completed -[Iteration 7, Thread 1] Got lock -[Iteration 7, Thread 1] Critical section done, previously next=0, now next=1 [Iteration 7, Thread 2] Got lock -[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2 +[Iteration 7, Thread 2] Critical section done, previously next=0, now next=2 [Iteration 7, Thread 3] Got lock [Iteration 7, Thread 3] Critical section done, previously next=2, now next=3 +[Iteration 7, Thread 1] Got lock +[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1 Iteration 7 completed -[Iteration 8, Thread 2] Got lock -[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2 -[Iteration 8, Thread 1] Got lock -[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1 [Iteration 8, Thread 3] Got lock -[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3 +[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3 +[Iteration 8, Thread 1] Got lock +[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1 +[Iteration 8, Thread 2] Got lock +[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2 Iteration 8 completed [Iteration 9, Thread 1] Got lock [Iteration 9, Thread 1] Critical section done, previously next=0, now next=1 @@ -81,4 +82,4 @@ Iteration 9 completed [Iteration 10, Thread 1] Critical section done, previously next=3, now next=1 Iteration 10 completed PASSED :-) -Exiting @ tick 262794500 because target called exit() +Exiting @ tick 264840500 because target called exit() diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt index 73bc4c073..ffbc68284 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000265 # Nu sim_ticks 264840500 # Number of ticks simulated final_tick 264840500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1022675 # Simulator instruction rate (inst/s) -host_op_rate 1022653 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 408888728 # Simulator tick rate (ticks/s) -host_mem_usage 306160 # Number of bytes of host memory used -host_seconds 0.65 # Real time elapsed on the host +host_inst_rate 154084 # Simulator instruction rate (inst/s) +host_op_rate 154083 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 61608375 # Simulator tick rate (ticks/s) +host_mem_usage 302100 # Number of bytes of host memory used +host_seconds 4.30 # Real time elapsed on the host sim_insts 662366 # Number of instructions simulated sim_ops 662366 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts |