diff options
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt')
| -rw-r--r-- | tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt index 05221f315..d838cf147 100644 --- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt @@ -1,12 +1,12 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.006111 # Number of seconds simulated -sim_ticks 6111458 # Number of ticks simulated -final_tick 6111458 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.006151 # Number of seconds simulated +sim_ticks 6151475 # Number of ticks simulated +final_tick 6151475 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 30926 # Simulator tick rate (ticks/s) -host_mem_usage 418916 # Number of bytes of host memory used -host_seconds 197.62 # Real time elapsed on the host +host_tick_rate 48581 # Simulator tick rate (ticks/s) +host_mem_usage 419240 # Number of bytes of host memory used +host_seconds 126.62 # Real time elapsed on the host system.l1_cntrl4.L1DcacheMemory.num_data_array_reads 0 # number of data array reads system.l1_cntrl4.L1DcacheMemory.num_data_array_writes 0 # number of data array writes system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads @@ -109,29 +109,29 @@ system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 system.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array system.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array -system.cpu0.num_reads 99998 # number of read accesses completed -system.cpu0.num_writes 53877 # number of write accesses completed +system.cpu0.num_reads 100000 # number of read accesses completed +system.cpu0.num_writes 54250 # number of write accesses completed system.cpu0.num_copies 0 # number of copy accesses completed -system.cpu1.num_reads 99919 # number of read accesses completed -system.cpu1.num_writes 53996 # number of write accesses completed +system.cpu1.num_reads 99858 # number of read accesses completed +system.cpu1.num_writes 54337 # number of write accesses completed system.cpu1.num_copies 0 # number of copy accesses completed -system.cpu2.num_reads 99673 # number of read accesses completed -system.cpu2.num_writes 53416 # number of write accesses completed +system.cpu2.num_reads 99660 # number of read accesses completed +system.cpu2.num_writes 53758 # number of write accesses completed system.cpu2.num_copies 0 # number of copy accesses completed -system.cpu3.num_reads 100000 # number of read accesses completed -system.cpu3.num_writes 53266 # number of write accesses completed +system.cpu3.num_reads 99997 # number of read accesses completed +system.cpu3.num_writes 53569 # number of write accesses completed system.cpu3.num_copies 0 # number of copy accesses completed -system.cpu4.num_reads 99266 # number of read accesses completed -system.cpu4.num_writes 53358 # number of write accesses completed +system.cpu4.num_reads 99232 # number of read accesses completed +system.cpu4.num_writes 53727 # number of write accesses completed system.cpu4.num_copies 0 # number of copy accesses completed -system.cpu5.num_reads 99912 # number of read accesses completed -system.cpu5.num_writes 54055 # number of write accesses completed +system.cpu5.num_reads 99852 # number of read accesses completed +system.cpu5.num_writes 54401 # number of write accesses completed system.cpu5.num_copies 0 # number of copy accesses completed -system.cpu6.num_reads 99083 # number of read accesses completed -system.cpu6.num_writes 53609 # number of write accesses completed +system.cpu6.num_reads 99007 # number of read accesses completed +system.cpu6.num_writes 53961 # number of write accesses completed system.cpu6.num_copies 0 # number of copy accesses completed -system.cpu7.num_reads 99673 # number of read accesses completed -system.cpu7.num_writes 53053 # number of write accesses completed +system.cpu7.num_reads 99727 # number of read accesses completed +system.cpu7.num_writes 53437 # number of write accesses completed system.cpu7.num_copies 0 # number of copy accesses completed ---------- End Simulation Statistics ---------- |