diff options
Diffstat (limited to 'tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt b/tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt index 39b06f58a..d5c3e5af1 100644 --- a/tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.134921 # Nu sim_ticks 134921160500 # Number of ticks simulated final_tick 134921160500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1080841 # Simulator instruction rate (inst/s) -host_op_rate 1080841 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1650749081 # Simulator tick rate (ticks/s) -host_mem_usage 262472 # Number of bytes of host memory used -host_seconds 81.73 # Real time elapsed on the host +host_inst_rate 1865262 # Simulator instruction rate (inst/s) +host_op_rate 1865262 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2848781352 # Simulator tick rate (ticks/s) +host_mem_usage 261840 # Number of bytes of host memory used +host_seconds 47.36 # Real time elapsed on the host sim_insts 88340673 # Number of instructions simulated sim_ops 88340673 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -104,7 +104,9 @@ system.cpu.op_class::FloatAdd 114304 0.13% 60.27% # Cl system.cpu.op_class::FloatCmp 84 0.00% 60.27% # Class of executed instruction system.cpu.op_class::FloatCvt 113640 0.13% 60.40% # Class of executed instruction system.cpu.op_class::FloatMult 50 0.00% 60.40% # Class of executed instruction +system.cpu.op_class::FloatMultAcc 0 0.00% 60.40% # Class of executed instruction system.cpu.op_class::FloatDiv 37764 0.04% 60.44% # Class of executed instruction +system.cpu.op_class::FloatMisc 0 0.00% 60.44% # Class of executed instruction system.cpu.op_class::FloatSqrt 0 0.00% 60.44% # Class of executed instruction system.cpu.op_class::SimdAdd 0 0.00% 60.44% # Class of executed instruction system.cpu.op_class::SimdAddAcc 0 0.00% 60.44% # Class of executed instruction @@ -126,8 +128,10 @@ system.cpu.op_class::SimdFloatMisc 0 0.00% 60.44% # Cl system.cpu.op_class::SimdFloatMult 0 0.00% 60.44% # Class of executed instruction system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.44% # Class of executed instruction system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.44% # Class of executed instruction -system.cpu.op_class::MemRead 20366786 23.03% 83.47% # Class of executed instruction -system.cpu.op_class::MemWrite 14620629 16.53% 100.00% # Class of executed instruction +system.cpu.op_class::MemRead 20366476 23.03% 83.47% # Class of executed instruction +system.cpu.op_class::MemWrite 14619024 16.53% 100.00% # Class of executed instruction +system.cpu.op_class::FloatMemRead 310 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::FloatMemWrite 1605 0.00% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 88438073 # Class of executed instruction |