diff options
Diffstat (limited to 'tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini')
| -rw-r--r-- | tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini index b1d661d27..82326fb62 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -70,7 +71,9 @@ transition_latency=100000000 type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=false width=16 master=system.physmem.port @@ -95,6 +98,7 @@ latency_bins=20 outstanding_bins=20 read_addr_mask=18446744073709551615 sample_period=1000000000 +stack_dist_calc=Null system=system trace_compress=true trace_enable=false @@ -131,7 +135,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -140,6 +144,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 |