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Diffstat (limited to 'tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout')
-rwxr-xr-xtests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout11
1 files changed, 7 insertions, 4 deletions
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
index cffe93183..8a847077c 100755
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
@@ -1,10 +1,13 @@
+Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:54:17
-gem5 started Jan 22 2014 17:29:00
-gem5 executing on u200540-lin
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram -re tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram
+gem5 compiled Nov 15 2015 14:58:33
+gem5 started Nov 15 2015 14:58:46
+gem5 executing on ribera.cs.wisc.edu, pid 5049
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 100000000000 because simulate() limit reached