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-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini1
-rwxr-xr-xtests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout8
-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt6
-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini1
-rwxr-xr-xtests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout8
-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt6
6 files changed, 16 insertions, 14 deletions
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini
index 1c3eb8444..7ca6b51f7 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini
@@ -15,6 +15,7 @@ boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
+exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
index f6358b402..cf720d597 100755
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Dec 11 2015 20:23:08
-gem5 started Dec 11 2015 20:23:21
-gem5 executing on zizzer, pid 55322
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /z/atgutier/gem5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
+gem5 compiled Jan 21 2016 14:20:17
+gem5 started Jan 21 2016 14:20:32
+gem5 executing on zizzer, pid 63117
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /z/atgutier/gem5/gem5-commit/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
index 438149089..14d004205 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 4683886556 # Simulator tick rate (ticks/s)
-host_mem_usage 202144 # Number of bytes of host memory used
-host_seconds 21.35 # Real time elapsed on the host
+host_tick_rate 4618007467 # Simulator tick rate (ticks/s)
+host_mem_usage 202228 # Number of bytes of host memory used
+host_seconds 21.65 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 106649408 # Number of bytes read from this memory
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini
index 0936865ed..08be6a107 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/config.ini
@@ -15,6 +15,7 @@ boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
+exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
index dabb33d8a..38c82e1af 100755
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Dec 11 2015 20:23:08
-gem5 started Dec 11 2015 20:23:21
-gem5 executing on zizzer, pid 55316
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /z/atgutier/gem5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
+gem5 compiled Jan 21 2016 14:20:17
+gem5 started Jan 21 2016 14:20:32
+gem5 executing on zizzer, pid 63119
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /z/atgutier/gem5/gem5-commit/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
index 6a7ed28d3..710d324a6 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 15208030858 # Simulator tick rate (ticks/s)
-host_mem_usage 204576 # Number of bytes of host memory used
-host_seconds 6.58 # Real time elapsed on the host
+host_tick_rate 15880275218 # Simulator tick rate (ticks/s)
+host_mem_usage 204660 # Number of bytes of host memory used
+host_seconds 6.30 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 64 # Number of bytes read from this memory