summaryrefslogtreecommitdiff
path: root/tests/quick/se/70.tgen
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/70.tgen')
-rwxr-xr-xtests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout10
-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt6
-rwxr-xr-xtests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout10
-rw-r--r--tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt6
4 files changed, 14 insertions, 18 deletions
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
index 8a847077c..f6358b402 100755
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout
@@ -1,12 +1,10 @@
-Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simout
-Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 15 2015 14:58:33
-gem5 started Nov 15 2015 14:58:46
-gem5 executing on ribera.cs.wisc.edu, pid 5049
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
+gem5 compiled Dec 11 2015 20:23:08
+gem5 started Dec 11 2015 20:23:21
+gem5 executing on zizzer, pid 55322
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /z/atgutier/gem5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
index 54a9cbbda..438149089 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 6195134552 # Simulator tick rate (ticks/s)
-host_mem_usage 261500 # Number of bytes of host memory used
-host_seconds 16.14 # Real time elapsed on the host
+host_tick_rate 4683886556 # Simulator tick rate (ticks/s)
+host_mem_usage 202144 # Number of bytes of host memory used
+host_seconds 21.35 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 106649408 # Number of bytes read from this memory
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
index bbcc7960c..dabb33d8a 100755
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/simout
@@ -1,12 +1,10 @@
-Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simout
-Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 15 2015 14:58:33
-gem5 started Nov 15 2015 14:58:46
-gem5 executing on ribera.cs.wisc.edu, pid 5048
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
+gem5 compiled Dec 11 2015 20:23:08
+gem5 started Dec 11 2015 20:23:21
+gem5 executing on zizzer, pid 55316
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /z/atgutier/gem5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
index 57e0820a3..6a7ed28d3 100644
--- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
+++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.100000 # Nu
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 12448574230 # Simulator tick rate (ticks/s)
-host_mem_usage 263544 # Number of bytes of host memory used
-host_seconds 8.03 # Real time elapsed on the host
+host_tick_rate 15208030858 # Simulator tick rate (ticks/s)
+host_mem_usage 204576 # Number of bytes of host memory used
+host_seconds 6.58 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 64 # Number of bytes read from this memory