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-rw-r--r--tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini17
-rwxr-xr-xtests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout15
-rw-r--r--tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt10
3 files changed, 29 insertions, 13 deletions
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
index f59888773..ee2cc0275 100644
--- a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
@@ -24,6 +24,7 @@ mem_mode=timing
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
@@ -83,6 +84,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -99,6 +101,7 @@ system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
@@ -123,6 +126,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -139,6 +143,7 @@ system=system
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
@@ -171,6 +176,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -187,6 +193,7 @@ system=system
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
@@ -202,12 +209,13 @@ size=2097152
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
@@ -215,6 +223,13 @@ width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout
index cbae3bd7a..75e9491a4 100755
--- a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout
+++ b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout
@@ -1,12 +1,13 @@
+Redirecting stdout to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:50:23
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sav
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sv2
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:10
+gem5 executing on ribera.cs.wisc.edu, pid 7747
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@@ -23,4 +24,4 @@ Authors: Carl Sechen, Bill Swartz
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
info: Increasing stack size by one page.
-122 123 124 Exiting @ tick 270563082000 because target called exit()
+122 123 124 Exiting @ tick 270599529500 because target called exit()
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
index ab4d1300a..d31db6996 100644
--- a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.270600 # Nu
sim_ticks 270599529500 # Number of ticks simulated
final_tick 270599529500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1167307 # Simulator instruction rate (inst/s)
-host_op_rate 1167308 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1632884817 # Simulator tick rate (ticks/s)
-host_mem_usage 300512 # Number of bytes of host memory used
-host_seconds 165.72 # Real time elapsed on the host
+host_inst_rate 819670 # Simulator instruction rate (inst/s)
+host_op_rate 819671 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1146593662 # Simulator tick rate (ticks/s)
+host_mem_usage 296444 # Number of bytes of host memory used
+host_seconds 236.00 # Real time elapsed on the host
sim_insts 193444518 # Number of instructions simulated
sim_ops 193444756 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts