diff options
Diffstat (limited to 'tests/quick/se/70.twolf/ref/sparc/linux/simple-timing')
-rw-r--r-- | tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt index 5920b739e..c6c812ce5 100644 --- a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.270605 # Nu sim_ticks 270604702500 # Number of ticks simulated final_tick 270604702500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1707855 # Simulator instruction rate (inst/s) -host_op_rate 1707857 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2389075229 # Simulator tick rate (ticks/s) -host_mem_usage 256284 # Number of bytes of host memory used -host_seconds 113.27 # Real time elapsed on the host +host_inst_rate 1830893 # Simulator instruction rate (inst/s) +host_op_rate 1830895 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2561189341 # Simulator tick rate (ticks/s) +host_mem_usage 255916 # Number of bytes of host memory used +host_seconds 105.66 # Real time elapsed on the host sim_insts 193444518 # Number of instructions simulated sim_ops 193444756 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -65,7 +65,9 @@ system.cpu.op_class::FloatAdd 875036 0.45% 60.33% # Cl system.cpu.op_class::FloatCmp 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::FloatCvt 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::FloatMult 0 0.00% 60.33% # Class of executed instruction +system.cpu.op_class::FloatMultAcc 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::FloatDiv 0 0.00% 60.33% # Class of executed instruction +system.cpu.op_class::FloatMisc 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::FloatSqrt 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::SimdAdd 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::SimdAddAcc 0 0.00% 60.33% # Class of executed instruction @@ -87,8 +89,10 @@ system.cpu.op_class::SimdFloatMisc 0 0.00% 60.33% # Cl system.cpu.op_class::SimdFloatMult 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.33% # Class of executed instruction system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.33% # Class of executed instruction -system.cpu.op_class::MemRead 57735103 29.85% 90.18% # Class of executed instruction -system.cpu.op_class::MemWrite 18998867 9.82% 100.00% # Class of executed instruction +system.cpu.op_class::MemRead 56837780 29.38% 89.71% # Class of executed instruction +system.cpu.op_class::MemWrite 18800854 9.72% 99.43% # Class of executed instruction +system.cpu.op_class::FloatMemRead 897323 0.46% 99.90% # Class of executed instruction +system.cpu.op_class::FloatMemWrite 198013 0.10% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 193445773 # Class of executed instruction |