summaryrefslogtreecommitdiff
path: root/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt')
-rw-r--r--tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt18
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
index 180cfa389..cb7e359a9 100644
--- a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.250992 # Nu
sim_ticks 250991873500 # Number of ticks simulated
final_tick 250991873500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1054537 # Simulator instruction rate (inst/s)
-host_op_rate 1767501 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2004072574 # Simulator tick rate (ticks/s)
-host_mem_usage 299608 # Number of bytes of host memory used
-host_seconds 125.24 # Real time elapsed on the host
+host_inst_rate 1067110 # Simulator instruction rate (inst/s)
+host_op_rate 1788574 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 2027966293 # Simulator tick rate (ticks/s)
+host_mem_usage 298984 # Number of bytes of host memory used
+host_seconds 123.77 # Real time elapsed on the host
sim_insts 132071193 # Number of instructions simulated
sim_ops 221363385 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -71,7 +71,9 @@ system.cpu.op_class::FloatAdd 1105073 0.50% 65.14% # Cl
system.cpu.op_class::FloatCmp 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 65.14% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 65.14% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 65.14% # Class of executed instruction
@@ -93,8 +95,10 @@ system.cpu.op_class::SimdFloatMisc 0 0.00% 65.14% # Cl
system.cpu.op_class::SimdFloatMult 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 65.14% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt 0 0.00% 65.14% # Class of executed instruction
-system.cpu.op_class::MemRead 56649587 25.59% 90.73% # Class of executed instruction
-system.cpu.op_class::MemWrite 20515717 9.27% 100.00% # Class of executed instruction
+system.cpu.op_class::MemRead 55945136 25.27% 90.41% # Class of executed instruction
+system.cpu.op_class::MemWrite 20410230 9.22% 99.63% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 704451 0.32% 99.95% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 105487 0.05% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 221363385 # Class of executed instruction