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-rw-r--r--tests/test-progs/asmtest/src/riscv/isa/rv64ui/jal.S59
1 files changed, 59 insertions, 0 deletions
diff --git a/tests/test-progs/asmtest/src/riscv/isa/rv64ui/jal.S b/tests/test-progs/asmtest/src/riscv/isa/rv64ui/jal.S
new file mode 100644
index 000000000..00c65d8ad
--- /dev/null
+++ b/tests/test-progs/asmtest/src/riscv/isa/rv64ui/jal.S
@@ -0,0 +1,59 @@
+# See LICENSE for license details.
+
+#*****************************************************************************
+# jal.S
+#-----------------------------------------------------------------------------
+#
+# Test jal instruction.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+RVTEST_RV64U
+RVTEST_CODE_BEGIN
+
+ #-------------------------------------------------------------
+ # Test 2: Basic test
+ #-------------------------------------------------------------
+
+test_2:
+ li TESTNUM, 2
+ li ra, 0
+
+ jal x4, target_2
+linkaddr_2:
+ nop
+ nop
+
+ j fail
+
+target_2:
+ la x2, linkaddr_2
+ bne x2, x4, fail
+
+ #-------------------------------------------------------------
+ # Test delay slot instructions not executed nor bypassed
+ #-------------------------------------------------------------
+
+ TEST_CASE( 3, ra, 3, \
+ li ra, 1; \
+ jal x0, 1f; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+ addi ra, ra, 1; \
+1: addi ra, ra, 1; \
+ addi ra, ra, 1; \
+ )
+
+ TEST_PASSFAIL
+
+RVTEST_CODE_END
+
+ .data
+RVTEST_DATA_BEGIN
+
+ TEST_DATA
+
+RVTEST_DATA_END