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-rw-r--r--tests/test1/ref/alpha/timing/config.ini8
-rw-r--r--tests/test1/ref/alpha/timing/config.out6
-rw-r--r--tests/test1/ref/alpha/timing/m5stats.txt18
-rw-r--r--tests/test1/ref/alpha/timing/stdout5
4 files changed, 18 insertions, 19 deletions
diff --git a/tests/test1/ref/alpha/timing/config.ini b/tests/test1/ref/alpha/timing/config.ini
index 58dc6741b..c4c381b93 100644
--- a/tests/test1/ref/alpha/timing/config.ini
+++ b/tests/test1/ref/alpha/timing/config.ini
@@ -48,11 +48,11 @@ text_file=m5stats.txt
[system]
type=System
-children=cpu0 physmem workload
+children=cpu physmem workload
mem_mode=atomic
physmem=system.physmem
-[system.cpu0]
+[system.cpu]
type=TimingSimpleCPU
children=mem
clock=1
@@ -63,11 +63,11 @@ max_insts_all_threads=0
max_insts_any_thread=500000
max_loads_all_threads=0
max_loads_any_thread=0
-mem=system.cpu0.mem
+mem=system.cpu.mem
system=system
workload=system.workload
-[system.cpu0.mem]
+[system.cpu.mem]
type=Bus
bus_id=0
diff --git a/tests/test1/ref/alpha/timing/config.out b/tests/test1/ref/alpha/timing/config.out
index b28de6f74..882db9c06 100644
--- a/tests/test1/ref/alpha/timing/config.out
+++ b/tests/test1/ref/alpha/timing/config.out
@@ -23,17 +23,17 @@ chkpt=
output=cout
system=system
-[system.cpu0.mem]
+[system.cpu.mem]
type=Bus
bus_id=0
-[system.cpu0]
+[system.cpu]
type=TimingSimpleCPU
max_insts_any_thread=500000
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
-mem=system.cpu0.mem
+mem=system.cpu.mem
system=system
workload=system.workload
clock=1
diff --git a/tests/test1/ref/alpha/timing/m5stats.txt b/tests/test1/ref/alpha/timing/m5stats.txt
index 64d05099f..5f7766bac 100644
--- a/tests/test1/ref/alpha/timing/m5stats.txt
+++ b/tests/test1/ref/alpha/timing/m5stats.txt
@@ -1,18 +1,18 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 739858 # Simulator instruction rate (inst/s)
-host_mem_usage 147760 # Number of bytes of host memory used
-host_seconds 0.68 # Real time elapsed on the host
-host_tick_rate 1006609 # Simulator tick rate (ticks/s)
+host_inst_rate 781730 # Simulator instruction rate (inst/s)
+host_mem_usage 147616 # Number of bytes of host memory used
+host_seconds 0.64 # Real time elapsed on the host
+host_tick_rate 1063244 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 500000 # Number of instructions simulated
sim_seconds 0.000001 # Number of seconds simulated
sim_ticks 680774 # Number of ticks simulated
-system.cpu0.idle_fraction 0 # Percentage of idle cycles
-system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu0.numCycles 0 # number of cpu cycles simulated
-system.cpu0.num_insts 500000 # Number of instructions executed
-system.cpu0.num_refs 182203 # Number of memory references
+system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+system.cpu.numCycles 0 # number of cpu cycles simulated
+system.cpu.num_insts 500000 # Number of instructions executed
+system.cpu.num_refs 182203 # Number of memory references
system.workload.PROG:num_syscalls 18 # Number of system calls
---------- End Simulation Statistics ----------
diff --git a/tests/test1/ref/alpha/timing/stdout b/tests/test1/ref/alpha/timing/stdout
index 980af1477..c5591df61 100644
--- a/tests/test1/ref/alpha/timing/stdout
+++ b/tests/test1/ref/alpha/timing/stdout
@@ -7,8 +7,7 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jul 19 2006 15:49:01
-M5 started Wed Jul 19 15:49:19 2006
+M5 compiled Jul 21 2006 16:19:30
+M5 started Fri Jul 21 16:19:43 2006
M5 executing on zamp.eecs.umich.edu
-Creating SE system
Exiting @ tick 680774 because a thread reached the max instruction count