6 files changed, 6 insertions, 6 deletions
diff --git a/tests/configs/simple-atomic.py b/tests/configs/simple-atomic.py
index 2bf67f3b1..d35ac4ae0 100644
--- a/tests/configs/simple-atomic.py
+++ b/tests/configs/simple-atomic.py
@@ -29,7 +29,7 @@
 import m5
 from m5.objects import *
 
-system = System(cpu = AtomicSimpleCPU(),
+system = System(cpu = AtomicSimpleCPU(cpu_id=0),
                 physmem = PhysicalMemory(),
                 membus = Bus())
 system.physmem.port = system.membus.port
diff --git a/tests/configs/simple-timing.py b/tests/configs/simple-timing.py
index 7bb76db0e..60190b47c 100644
--- a/tests/configs/simple-timing.py
+++ b/tests/configs/simple-timing.py
@@ -36,7 +36,7 @@ class MyCache(BaseCache):
     mshrs = 10
     tgts_per_mshr = 5
 
-cpu = TimingSimpleCPU()
+cpu = TimingSimpleCPU(cpu_id=0)
 cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'),
                               MyCache(size = '2MB'))
 cpu.mem = cpu.dcache
diff --git a/tests/configs/tsunami-simple-atomic-dual.py b/tests/configs/tsunami-simple-atomic-dual.py
index e3945f7dc..f798213db 100644
--- a/tests/configs/tsunami-simple-atomic-dual.py
+++ b/tests/configs/tsunami-simple-atomic-dual.py
@@ -34,7 +34,7 @@ import FSConfig
 AlphaConsole.cpu = Parent.cpu[0]
 IntrControl.cpu = Parent.cpu[0]
 
-cpus = [ AtomicSimpleCPU() for i in xrange(2) ]
+cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(2) ]
 system = FSConfig.makeLinuxAlphaSystem('atomic')
 system.cpu = cpus
 for c in cpus:
diff --git a/tests/configs/tsunami-simple-atomic.py b/tests/configs/tsunami-simple-atomic.py
index ca1dd5c77..623d285e4 100644
--- a/tests/configs/tsunami-simple-atomic.py
+++ b/tests/configs/tsunami-simple-atomic.py
@@ -31,7 +31,7 @@ from m5.objects import *
 m5.AddToPath('../configs/common')
 import FSConfig
 
-cpu = AtomicSimpleCPU()
+cpu = AtomicSimpleCPU(cpu_id=0)
 system = FSConfig.makeLinuxAlphaSystem('atomic')
 system.cpu = cpu
 cpu.connectMemPorts(system.membus)
diff --git a/tests/configs/tsunami-simple-timing-dual.py b/tests/configs/tsunami-simple-timing-dual.py
index 967d6a2d2..bf94214fd 100644
--- a/tests/configs/tsunami-simple-timing-dual.py
+++ b/tests/configs/tsunami-simple-timing-dual.py
@@ -34,7 +34,7 @@ import FSConfig
 AlphaConsole.cpu = Parent.cpu[0]
 IntrControl.cpu = Parent.cpu[0]
 
-cpus = [ TimingSimpleCPU() for i in xrange(2) ]
+cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(2) ]
 system = FSConfig.makeLinuxAlphaSystem('timing')
 system.cpu = cpus
 for c in cpus:
diff --git a/tests/configs/tsunami-simple-timing.py b/tests/configs/tsunami-simple-timing.py
index b3fc9d105..2edf5ac32 100644
--- a/tests/configs/tsunami-simple-timing.py
+++ b/tests/configs/tsunami-simple-timing.py
@@ -31,7 +31,7 @@ from m5.objects import *
 m5.AddToPath('../configs/common')
 import FSConfig
 
-cpu = TimingSimpleCPU()
+cpu = TimingSimpleCPU(cpu_id=0)
 system = FSConfig.makeLinuxAlphaSystem('timing')
 system.cpu = cpu
 cpu.connectMemPorts(system.membus)