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-rw-r--r--tests/configs/tgen-simple-dram.py5
-rw-r--r--tests/configs/tgen-simple-mem.py5
-rw-r--r--tests/quick/se/70.tgen/tgen-simple-mem.trc4
3 files changed, 12 insertions, 2 deletions
diff --git a/tests/configs/tgen-simple-dram.py b/tests/configs/tgen-simple-dram.py
index 76762cdc8..0e9edc171 100644
--- a/tests/configs/tgen-simple-dram.py
+++ b/tests/configs/tgen-simple-dram.py
@@ -38,6 +38,11 @@
import m5
from m5.objects import *
+# both traffic generator and communication monitor are only available
+# if we have protobuf support, so potentially skip this test
+require_sim_object("TrafficGen")
+require_sim_object("CommMonitor")
+
# even if this is only a traffic generator, call it cpu to make sure
# the scripts are happy
cpu = TrafficGen(config_file = "tests/quick/se/70.tgen/tgen-simple-dram.cfg")
diff --git a/tests/configs/tgen-simple-mem.py b/tests/configs/tgen-simple-mem.py
index ae7364214..d402e557c 100644
--- a/tests/configs/tgen-simple-mem.py
+++ b/tests/configs/tgen-simple-mem.py
@@ -38,6 +38,11 @@
import m5
from m5.objects import *
+# both traffic generator and communication monitor are only available
+# if we have protobuf support, so potentially skip this test
+require_sim_object("TrafficGen")
+require_sim_object("CommMonitor")
+
# even if this is only a traffic generator, call it cpu to make sure
# the scripts are happy
cpu = TrafficGen(config_file = "tests/quick/se/70.tgen/tgen-simple-mem.cfg")
diff --git a/tests/quick/se/70.tgen/tgen-simple-mem.trc b/tests/quick/se/70.tgen/tgen-simple-mem.trc
index e260f8a65..58f0e1115 100644
--- a/tests/quick/se/70.tgen/tgen-simple-mem.trc
+++ b/tests/quick/se/70.tgen/tgen-simple-mem.trc
@@ -1,2 +1,2 @@
-r,19088743,64,1000
-w,48879,64,4000
+gem51
+)Converted ASCII trace tgen-simple-mem.trc 犍 @  @ \ No newline at end of file