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-rw-r--r--tests/configs/pc-simple-timing-ruby.py6
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/configs/pc-simple-timing-ruby.py b/tests/configs/pc-simple-timing-ruby.py
index 57f9b6679..81ec2fa9b 100644
--- a/tests/configs/pc-simple-timing-ruby.py
+++ b/tests/configs/pc-simple-timing-ruby.py
@@ -82,9 +82,9 @@ for (i, cpu) in enumerate(system.cpu):
cpu.dcache_port = system.ruby._cpu_ruby_ports[i].slave
cpu.itb.walker.port = system.ruby._cpu_ruby_ports[i].slave
cpu.dtb.walker.port = system.ruby._cpu_ruby_ports[i].slave
- cpu.interrupts.pio = system.piobus.master
- cpu.interrupts.int_master = system.piobus.slave
- cpu.interrupts.int_slave = system.piobus.master
+ cpu.interrupts.pio = system.ruby._cpu_ruby_ports[i].master
+ cpu.interrupts.int_master = system.ruby._cpu_ruby_ports[i].slave
+ cpu.interrupts.int_slave = system.ruby._cpu_ruby_ports[i].master
# Set access_phys_mem to True for ruby port
system.ruby._cpu_ruby_ports[i].access_phys_mem = True