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+# Copyright (c) 2015 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+#
+
+def upgrader(cpt):
+ """The gem5 GIC extensions change the size of many GIC data
+ structures. Resize them to match the new GIC."""
+
+ import re
+ if cpt.get('root','isa') != 'arm':
+ return
+
+ old_cpu_max = 8
+ new_cpu_max = 256
+ sgi_max = 16
+ ppi_max = 16
+ per_cpu_regs = (
+ ("iccrpr", [ "0xff", ]),
+ ("cpuEnabled", [ "false", ]),
+ ("cpuPriority", [ "0xff", ]),
+ ("cpuBpr", [ "0", ]),
+ ("cpuHighestInt", [ "1023", ]),
+ ("cpuPpiPending", [ "0", ]),
+ ("cpuPpiActive", [ "0", ] ),
+ ("interrupt_time", [ "0", ]),
+ ("*bankedIntPriority", ["0", ] * (sgi_max + ppi_max)),
+ )
+ new_per_cpu_regs = (
+ ("cpuSgiPendingExt", "0"),
+ ("cpuSgiActiveExt", "0"),
+ )
+
+ for sec in cpt.sections():
+ if re.search('.*\.gic$', sec):
+ for reg, default in per_cpu_regs:
+ value = cpt.get(sec, reg).split(" ")
+ assert len(value) / len(default) == old_cpu_max, \
+ "GIC register size mismatch"
+ value += [ " ".join(default), ] * (new_cpu_max - old_cpu_max)
+ cpt.set(sec, reg, " ".join(value))
+
+ for reg, default in new_per_cpu_regs:
+ cpt.set(sec, reg, " ".join([ default, ] * new_cpu_max))