1 files changed, 13 insertions, 0 deletions
diff --git a/util/cpt_upgraders/remove-arm-cpsr-mode-miscreg.py b/util/cpt_upgraders/remove-arm-cpsr-mode-miscreg.py
new file mode 100644
index 000000000..be3bf07b5
--- /dev/null
+++ b/util/cpt_upgraders/remove-arm-cpsr-mode-miscreg.py
@@ -0,0 +1,13 @@
+# Remove the MISCREG_CPSR_MODE register from the ARM register file
+def upgrader(cpt):
+    if cpt.get('root','isa') == 'arm':
+        for sec in cpt.sections():
+            import re
+            # Search for all ISA sections
+            if re.search('.*sys.*\.cpu.*\.isa$', sec):
+                mr = cpt.get(sec, 'miscRegs').split()
+                # Remove MISCREG_CPSR_MODE
+                del mr[137]
+                cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
+
+legacy_version = 5