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2011-06-17ARM: Cleanup m5ops usage of r0 and r1 a bit.Ali Saidi
2011-06-17ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.Gedare Bloom
2011-06-16ARM: Handle case where new TLB size is different from previous TLB size.Ali Saidi
After a checkpoint we need to make sure that we restore the right number of entries.
2011-06-16ARM: Fix memset on TLB flush and initializationChander Sudanthi
Instead of clearing the entire TLB on initialization and flush, the code was clearing only one element. This patch corrects the memsets in the init and flush routines.
2011-06-14Ruby: Correct set LONG_BITS and INDEX_SHIFT in class Set.Nilay Vaish
The code for Set class was written under the assumption that std::numeric_limits<long>::digits returns the number of bits used for data type long, which was presumed to be either 32 or 64. But return value is actually one less, that is, it is either 31 or 63. The value is now being incremented by 1 so as to correctly set it.
2011-06-12Loader: Handle bad section names when loading an ELF file.Gabe Black
If there's a problem when reading the section names from a supposed ELF file, this change makes gem5 print an error message as returned by libelf and die. Previously these sorts of errors would make gem5 segfault when it tried to access the section name through a NULL pointer.
2011-06-12LibElf: Build the error management code in libelf.Gabe Black
This change makes some minor changes to get the error management code in libelf to build on Linux and to build it into the library.
2011-06-12sparc: update long regressionsKorey Sewell
2011-06-10sparc: update o3 regressionsKorey Sewell
2011-06-10o3: missing newlines on some dprintfsKorey Sewell
2011-06-10sparc: don't use directcntrl branch flagKorey Sewell
this flag is only used for early branch resolution in the O3 model (of pc-relative branches) but this isnt cleanly working even when the branch target code is added for sparc. For now, we'll ignore this optimization and add a todo in the SPARC ISA for future developers
2011-06-10sparc: merge regr. updates w/last updateKorey Sewell
2011-06-10sparc: update simple cpu regressionsKorey Sewell
use stats file generated by zizzer
2011-06-09sparc: compilation fixes for inorderKorey Sewell
Add a few constants and functions that the InOrder model wants for SPARC. * * * sparc: add eaComp function InOrder separates the address generation from the actual access so give Sparc that functionality * * * sparc: add control flags for branches branch predictors and other cpu model functions need to know specific information about branches, so add the necessary flags here
2011-06-08Ruby: Correctly set access permissions for directory entriesNilay Vaish
The access permissions for the directory entries are not being set correctly. This is because pointers are not used for handling directory entries. function. get and set functions for access permissions have been added to the Controller state machine. The changePermission() function provided by the AbstractEntry and AbstractCacheEntry classes has been exposed to SLICC code once again. The set_permission() functionality has been removed. NOTE: Each protocol will have to define these get and set functions in order to compile successfully.
2011-06-08Mem: Use sysconf to get the page size instead of the PAGE_SIZE macro.Gabe Black
2011-06-07ISA parser: Loosen the regular expressions matching filenames.Gabe Black
The regular expressions matching filenames in the ##include directives and the internally generated ##newfile directives where only looking for filenames composed of alpha numeric characters, periods, and dashes. In Unix/Linux, the rules for what characters can be in a filename are much looser than that. This change replaces those expressions with ones that look for anything other than a quote character. Technically quote characters are allowed as well so we should allow escaping them somehow, but the additional complexity probably isn't worth it.
2011-06-07gcc 4.0: Add some virtual destructors to make gcc 4.0 happy.Gabe Black
2011-06-03SLICC: Remove machine name as prefix to functionsNilay Vaish
Currently, the machine name is appended before any of the functions defined with in the sm files. This is not necessary and it also means that these functions cannot be used outside the sm files. This patch does away with the prefixes. Note that the generated C++ files in which the code for these functions is present are still named such that the machine name is the prefix.
2011-06-02SConstruct: automatically update .hg/hgrc with style hooks.Steve Reinhardt
Seems easier than pestering people about it. Note also that path is now absolute, so you don't get errors when invoking hg from subdirectories. Also whacked unused mercurial_bin_not_found message (the code that used this was deleted a couple months ago in rev 5138d1e453f1).
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-06-02scons: rename some things from m5 to gem5Nathan Binkert
The default generated binary is now gem5.<type> instead of m5.<type>. The latter does still work but gem5.<type> will be generated first and then m5.<type> will be hard linked to it.
2011-06-02copyright: Add code for finding all copyright blocks and create a COPYING fileNathan Binkert
The end of the COPYING file was generated with: % python ./util/find_copyrights.py configs src system tests util Update -C command line option to spit out COPYING file
2011-06-02copyright: clean up copyright blocksNathan Binkert
2011-06-01SimObject: allow modules in subclass definitionsSteve Reinhardt
In particular, this avoids crashing when you do an import (like "import pdb") inside a SimObject subclass definition.
2011-05-31orion: bug fix in link power, and some reorgTushar Krishna
2011-05-31garnet: added network ptr to links to be used by orionTushar Krishna
2011-05-29Misc: Remove the URL from warnings, fatals, panics, etc.Gabe Black
2011-05-25Name: Replace M5 with gem5 in a few places it's printed on startup.Gabe Black
2011-05-24style: Make the style hook work in directories other than the root.Nathan Binkert
2011-05-23sim: style fixes in sim/process.hhSteve Reinhardt
2011-05-23syscall emul: fix Power Linux mmap constant, plus other cleanupSteve Reinhardt
We were getting a spurious warning in the regressions that turned out to be due to having the wrong value for TGT_MAP_ANONYMOUS for Power Linux, but in the process of tracking it down I ended up doing some cleanup of the mmap handling in general.
2011-05-23config: revamp x86 config to avoid appending to SimObjectVectorsSteve Reinhardt
A significant contributor to the need for adoptOrphanParams() is the practice of appending to SimObjectVectors which have already been assigned as children. This practice sidesteps the assignment operation for those appended SimObjects, which is where parent/child relationships are typically established. This patch reworks the config scripts that use append() on SimObjectVectors, which all happen to be in the x86 system configuration. At some point in the future, I hope to make SimObjectVectors immutable (by deriving from tuple rather than list), at which time this patch will be necessary for correct operation. For now, it just avoids some of the warning messages that get printed in adoptOrphanParams().
2011-05-23config: tweak ruby configs to clean up hierarchySteve Reinhardt
Re-enabling implicit parenting (see previous patch) causes current Ruby config scripts to create some strange hierarchies and generate several warnings. This patch makes three general changes to address these issues. 1. The order of object creation in the ruby config files makes the L1 caches children of the sequencer rather than the controller; these config ciles are rewritten to assign the L1 caches to the controller first. 2. The assignment of the sequencer list to system.ruby.cpu_ruby_ports causes the sequencers to be children of system.ruby, generating warnings because they are already parented to their respective controllers. Changing this attribute to _cpu_ruby_ports fixes this because the leading underscore means this is now treated as a plain Python attribute rather than a child assignment. As a result, the configuration hierarchy changes such that, e.g., system.ruby.cpu_ruby_ports0 becomes system.l1_cntrl0.sequencer. 3. In the topology classes, the routers become children of some random internal link node rather than direct children of the topology. The topology classes are rewritten to assign the routers to the topology object first.
2011-05-23config: reinstate implicit parenting on parameter assignmentSteve Reinhardt
Last summer's big rewrite of the initialization code (in particular cset 6efc3672733b) got rid of the implicit parenting that used to occur when an unparented SimObject was assigned as a parameter value to another SimObject. The idea was that the new adoptOrphanParams() step would catch these anyway so it was unnecessary. Unfortunately it turns out that adoptOrphanParams() has some inherent instability in that the parent that does the adoption depends on the config tree traversal order. Even making this order deterministic (e.g., by traversing children in alphabetical order) can introduce unwanted and unexpected hierarchy changes between similar configs (e.g., when adding a switch_cpu in place of a cpu), causing problems when trying to restore checkpoints across similar configs. The hierarchy created by implicit parenting is more stable and more controllable, so this patch turns that behavior back on. This patch also cleans up some long-standing holes regarding parenting of SimObjects that are created in class definitions (either in the body of the class, or as default parameters). To avoid breaking some existing config files, this necessitated changing the error on reparenting children to a warning. This change fixes another bug where attempting to print the prior error message would fail on reparenting SimObjectVectors because they lack a _parent attribute. Some further issues with SimObjectVectors were cleaned up by getting rid of the get_parent() call (which could cause errors with some SimObjectVectors where there was no single parent to return) with has_parent() (since all the uses of get_parent() were just boolean tests anyway). Finally, since the adoptOrphanParam() step turned out to be so problematic, we now issue a warning when it actually has to do an adoption. Future cleanup of config files will get rid of current warnings.
2011-05-23sim: add some DPRINTFs for debugging unserializationSteve Reinhardt
Also got rid of unused C++ unserializeAll() method (this is now handled in Python)
2011-05-23util/regress: make default action a more thorough regressionSteve Reinhardt
Changed the --variants option to --test-variants and added a new --compile-variants option for variants that are only compiled (not tested). The former still defaults to 'opt' and the latter defaults to 'debug,fast'. Also changed the behavior when no tests are specified from just compiling to running the 'quick' tests. As a result, a plain 'util/regress' invocation will now compile (but not test) the debug and fast builds, and compile and run the quick regressions on the opt build. This should be the default set of tests that are run before committing. Since the nightly regressions use this same script, this will also be the new nightly regression behavior. Test-only regressions can still be done by setting --compile=''. Compile-only regressions can be done by setting --test=''.
2011-05-23configs: missed spot progress-interval changeKorey Sewell
2011-05-23Stats: Update stats for minor O3 changes below.Ali Saidi
2011-05-23O3: Fix offset calculation into storeQueue buffer for store->load forwardingGeoffrey Blake
Calculation of offset to copy from storeQueue[idx].data structure for load to store forwarding fixed to be difference in bytes between store and load virtual addresses. Previous method would induce bug where a load would index into buffer at the wrong location.
2011-05-23O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.Geoffrey Blake
If a split load fails on a blocked cache wbOutstanding can be decremented twice if the first part of the split load succeeds and the second part fails. Condition the decrementing on not having completed the first part of the load.
2011-05-23O3: Fix issue with interrupts/faults occuring in the middle of a macro-opGeoffrey Blake
This patch fixes two problems with the O3 cpu model. The first is an issue with an instruction fetch causing a fault on the next address while the current macro-op is being issued. This happens when the micro-ops exceed the fetch bandwdith and then on the next cycle the fetch stage attempts to issue a request to the next line while it still has micro-ops to issue if the next line faults a fault is attached to a micro-op in the currently executing macro-op rather than a "nop" from the next instruction block. This leads to an instruction incorrectly faulting when on fetch when it had no reason to fault. A similar problem occurs with interrupts. When an interrupt occurs the fetch stage nominally stops issuing instructions immediately. This is incorrect in the case of a macro-op as the current location might not be interruptable.
2011-05-21garnet: use vnet_type from protocol to decide buffer depthsTushar Krishna
The virtual channels within "response" vnets are made buffers_per_data_vc deep (default=4), while virtual channels within other vnets are made buffers_per_ctrl_vc deep (default = 1). This is for accurate power estimates.
2011-05-21configs: remove -p from ruby_network_test.pyTushar Krishna
A recent patch broke the ruby network tester by adding -p inside Options.py which conflicts with the -p inside ruby_network_test.py. Have removed -p from ruby_network_test.py
2011-05-20configs: cleanup redundant/unused optionsKorey Sewell
maxinsts & max_inst redundant prog_intvl and profile seem redundant, but profile looks to be unused add -p option for progress intervals
2011-05-20slicc: added vnet_type to MI_exampleTushar Krishna
Forgot to add this to MI_example in my previous patch.
2011-05-18gcc: fix an uninitialized variable warning from G++ 4.5Nathan Binkert
2011-05-18slicc: added vnet_type field to identify response vnets from othersTushar Krishna
Identifying response vnets versus other vnets will allow garnet to determine which vnets will carry data packets, and which will carry ctrl packets, and use appropriate buffer sizes (since data packets are larger than ctrl packets). This in turn allows the orion power model to accurately estimate buffer power.
2011-05-18garnet: rename and rearrange config parameters.Tushar Krishna
Renamed (message) class to vnet for consistency with rest of ruby. Moved some parameters specific to fixed/flexible garnet networks into their corresponding py files.
2011-05-13ARM: Fix up stats for previous changes to condition codesAli Saidi