summaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2011-05-12stats: move code that loops over all stats into pythonNathan Binkert
2011-05-12stats: better expose statistics to python.Nathan Binkert
2011-05-09work around gcc 4.5 warningNathan Binkert
2011-05-07NetworkTest: added sim_cycles parameter to the network tester.Tushar Krishna
2011-05-07network: added Torus and Pt2Pt topologiesTushar Krishna
2011-05-07Trace: Remove the options trace-help and trace-flagsNilay Vaish
2011-05-06X86: Fix the Lldt instructions so they load the ldtr and not the tr.Gabe Black
2011-05-05ruby: use RubyMemory flag & remove setDebug() functionalityKorey Sewell
2011-05-04ARM: Update ARM_FS stats for mp changesAli Saidi
2011-05-04ARM: Configure bootloader parametersAli Saidi
2011-05-04ARM: Add support for loading the a bootloader and configuring parameters for itAli Saidi
2011-05-04ARM: Implement WFE/WFI/SEV semantics.Prakash Ramrakhyani
2011-05-04ARM: Add support for MP misc regs and broadcast flushes.Ali Saidi
2011-05-04ARM: Make GIC handle IPIs and multiple processors.Prakash Ramrakhyani
2011-05-04ARM: Add snoop control unit device.Ali Saidi
2011-05-04ARM: Add support for some more registers in the real view controller.Ali Saidi
2011-05-04ARM: Boot loader changes that make it more flexible about load and I/O addrsPrakash Ramrakhyani
2011-05-04O3/ARM: Update stats for recent changes.Ali Saidi
2011-05-04Debug: Add a function to cause the simulator to create a checkpoint from GDB.Ali Saidi
2011-05-04CPU: Add some useful debug message to the timing simple cpu.Ali Saidi
2011-05-04CPU: Fix a case where timing simple cpu faults can nest.Ali Saidi
2011-05-04O3: Remove assertion for case that is actually handled in code.Ali Saidi
2011-05-04Core: Add some documentation about the sim clocks.Ali Saidi
2011-05-04RealView: Fix the 24 and 100MHz clocks which were providing incorrect values.Chris Emmons
2011-05-04O3: Fix a small corner case with the lsq hazard detection logic.Ali Saidi
2011-05-04ARM: Add vfpv3 support to native trace.Ali Saidi
2011-05-04ARM: Fix small bug with vcvt instructionAli Saidi
2011-05-04debug: fix help outputNathan Binkert
2011-05-02scons: interpret paths relative to launch directorySteve Reinhardt
2011-05-02scons: allow use of current builds as default build settingsSteve Reinhardt
2011-05-02ruby: dbg: use system ticks instead of cyclesKorey Sewell
2011-04-29Util: Replace mkblankimage.sh with the new gem5img.py.Gabe Black
2011-04-28regress: updates after changing ruby network bandwidthBrad Beckmann
2011-04-28network: set the ExtLink bw to 16 bytesBrad Beckmann
2011-04-28garnet: removed flit_width from RoutersBrad Beckmann
2011-04-28network: adjusted default endpoint bandwidthBrad Beckmann
2011-04-28network: removed the unused network-wide latency paramBrad Beckmann
2011-04-28network: moved network config paramsBrad Beckmann
2011-04-28network: basic link bw for garnet and simple networksBrad Beckmann
2011-04-28network: convert links & switches to first class C++ SimObjectsBrad Beckmann
2011-04-28garnet: cleaned up flexible network header fileBrad Beckmann
2011-04-28ruby: moved topology to the top network directoryBrad Beckmann
2011-04-28ruby: removed dated comment in SimpleNetworkBrad Beckmann
2011-04-28event: fix PythonEventNathan Binkert
2011-04-25stats: update 20.parser o3 now that it works. realview-o3 works too.Nathan Binkert
2011-04-25base: include types.hh in base/stats/mysql.hhNilay Vaish
2011-04-23X86: When decoding a memory only inst, fault on reg encodings, don't assert.Gabe Black
2011-04-22tests: updates for stat name changeNathan Binkert
2011-04-20stats: ensure that stat names are validNathan Binkert
2011-04-20stats: one more name violationNathan Binkert