| Age | Commit message (Expand) | Author |
|---|
| 2008-11-15 | Output: Include gzstream package to allow automatically-gzipped output | Clint Smullen |
| 2008-11-15 | syscalls: fix latent brk/obreak bug. | Steve Reinhardt |
| 2008-11-15 | Remove the pointless, repository destroying assertion and just have the scrip... | Clint Smullen |
| 2008-11-14 | Cache: get rid of obsolete Tag methods. | Steve Reinhardt |
| 2008-11-14 | Fix a bunch of bugs I introduced when I changed the flags stuff for packets. | Nathan Binkert |
| 2008-11-13 | CPU: Refactor read/write in the simple timing CPU. | Gabe Black |
| 2008-11-13 | X86: Update the mcf stats. | Gabe Black |
| 2008-11-10 | SCons: Allow top level directory of EXTRAS able to contain SConscripts. | Nathan Binkert |
| 2008-11-10 | pseudo inst: Add rpns (read processor nanoseconds) instruction. | Nathan Binkert |
| 2008-11-10 | Clean up the SimpleTimingPort class a little bit. | Nathan Binkert |
| 2008-11-10 | clean: Move some stuff from the hh file to the cc file. | Nathan Binkert |
| 2008-11-10 | python: Fix the reference counting for python events placed on the eventq. | Nathan Binkert |
| 2008-11-10 | O3CPU: Make the instcount debugging stuff per-cpu. | Clint Smullen |
| 2008-11-10 | mem: update stuff for changes to Packet and Request | Nathan Binkert |
| 2008-11-10 | style: clean up the Packet stuff | Nathan Binkert |
| 2008-11-10 | flags: Provide an object for managing boolean flags for an object. | Nathan Binkert |
| 2008-11-10 | safe_cast: add a new cast function for casts that should always succeed. | Nathan Binkert |
| 2008-11-10 | DmaDevice: fix minor type in error message. | Steve Reinhardt |
| 2008-11-10 | mem: Assert that requests have non-negative size. | Steve Reinhardt |
| 2008-11-10 | Cache: Refactor packet forwarding a bit. | Steve Reinhardt |
| 2008-11-09 | X86: Add x86 reference output for the timing CPU. | Gabe Black |
| 2008-11-09 | CPU: Make unaligned accesses work in the timing simple CPU. | Gabe Black |
| 2008-11-09 | X86: Fix completeAcc get call. | Gabe Black |
| 2008-11-09 | X86: Make the timing simple CPU handle variable length instructions. | Gabe Black |
| 2008-11-06 | tracediff: add '#' support for sub-arg alternatives, '-n' param | Steve Reinhardt |
| 2008-11-06 | Automated merge with ssh://daystrom.m5sim.org//repo/m5 | Lisa Hsu |
| 2008-11-06 | Reference updates. Since split cache is gone, a lot of config.ini changes, a... | Lisa Hsu |
| 2008-11-05 | Automated merge with ssh://m5sim.org//repo/m5 | Lisa Hsu |
| 2008-11-05 | new mp eio test | Lisa Hsu |
| 2008-11-05 | Fix SPARC_FS compile | Lisa Hsu |
| 2008-11-05 | Right now a single thread cpu 1 could get assigned context Id != 1, depending | Lisa Hsu |
| 2008-11-05 | Fix a few more places where the context stuff wasn't changed | Nathan Binkert |
| 2008-11-04 | decouple eviction from insertion in the cache. | Lisa Hsu |
| 2008-11-04 | Change the findBlock(addr, lat) to accessBlock, which I think has better conn... | Lisa Hsu |
| 2008-11-04 | get rid of all instances of readTid() and getThreadNum(). Unify and eliminate | Lisa Hsu |
| 2008-11-02 | Add in Context IDs to the simulator. From now on, cpuId is almost never used, | Lisa Hsu |
| 2008-11-02 | Make it so that all thread contexts are registered with the System, even in | Lisa Hsu |
| 2008-11-02 | make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered | Lisa Hsu |
| 2008-10-28 | Libelf: Append options to CCFLAGS for warning free libelf compile instead of ... | Ali Saidi |
| 2008-10-27 | CPU: The API change to EventWrapper did not get propagated to the entirety o... | Clint Smullen |
| 2008-10-27 | Checkpointing: createCountedDrain function, it was only returning an Event, w... | Clint Smullen |
| 2008-10-26 | BATCH: Run as, ar, and ranlib with BATCH_CMD so that they execute on the batc... | Ali Saidi |
| 2008-10-23 | s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos in | Lisa Hsu |
| 2008-10-23 | probe function no longer used anywhere. | Lisa Hsu |
| 2008-10-23 | remove the totally obsolete split cache | Lisa Hsu |
| 2008-10-21 | style: Use the correct m5 style for things relating to interrupts. | Nathan Binkert |
| 2008-10-20 | Regression: Add single and dual boot O3 regressions. They both take about 8 m... | Ali Saidi |
| 2008-10-20 | O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo... | Ali Saidi |
| 2008-10-19 | Automated merge with ssh://daystrom.m5sim.org//z/repo/m5 | Lisa Hsu |
| 2008-10-16 | need to add packet_access.hh in order to get tempalte definition | Nathan Binkert |
