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2009-08-04slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllersDerek Hower
This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.
2009-08-04slicc: generate html by defaultDerek Hower
2009-08-03Automated merge with ssh://hg@m5sim.org/m5Derek Hower
2009-08-02X86: Set up the IDE device correctly, ie. with and using legacy ports.Gabe Black
2009-08-02IDE: Configure the IDE control to reflect the initial value of the command ↵Gabe Black
register.
2009-08-02X86: Fix the high result of mul1s, and removed undefined shifts from the ↵Gabe Black
mult microops.
2009-08-01Fix setting of INST_FETCH flag for O3 CPU.Steve Reinhardt
It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily whether it's getting set or not.
2009-08-01Clean up some inconsistencies with Request flags.Steve Reinhardt
2009-08-01Rename internal Request fields to start with '_'.Steve Reinhardt
The inconsistency was causing a subtle bug with some of the constructors where the params had the same name as the fields. This is also a first step to switching the accessors over to our new "standard", e.g., getVaddr() -> vaddr().
2009-07-31merge mips fix and statetrace changesKorey Sewell
2009-07-31mips: fix ll/sc pairs working incorrectly because of accidental clobber of ↵Korey Sewell
LLFLAG
2009-07-31regression: updated statsDerek Hower
2009-07-30compile: fix accidental conversion of == into =Nathan Binkert
2009-07-29ARM: Mul and mla ignore the c and v flags, but we were setting them to 1.Gabe Black
2009-07-29ruby: fixed clearStatsDerek Hower
2009-07-29Statetrace: Make sure the current state is loaded to print the initial stack ↵Gabe Black
frame. The early call to child->step() was removed earlier because it confused the new differences-only protocol ARM sendState() was using. It's necessary that that gets called at least once before attempting to print the initial stack frame, though, because otherwise statetrace doesn't know what the stack pointer is. By putting the first call to child->step() in a common spot, both needs are met.
2009-07-29ARM: Fix an instruction in the cmpxchg kernel provided routine.Gabe Black
The instruction was encoded as a load instead of the intended store.
2009-07-29ARM: Get rid of a stray line in the set_tls handler.Gabe Black
2009-07-29ARM: Make the ARM native tracer stop M5 if control diverges.Gabe Black
If the control flow of M5's executable and statetrace's target process get out of sync even a little, there will be a LOT of output, very little of which will be useful. There's also almost no hope for recovery. In those cases, we might as well give up and not generate a huge, mostly worthless trace file.
2009-07-29Simple CPU: Make the simple CPU handle the IntRegs trace flag.Gabe Black
2009-07-29ARM: Make sure the target process doesn't run away from statetrace.Gabe Black
2009-07-29ARM: Ignore the "times" system call.Ali Saidi
2009-07-29ARM: Fix an ioctl constant.Ali Saidi
2009-07-27ruby: removed unused/incorrect profiler stateDerek Hower
2009-07-27ARM: Update the stats for the EABI version of hello world.Gabe Black
2009-07-27ARM: Update some syscall constants and delete others that are Alpha only.Ali Saidi
2009-07-27ARM: Decode fstmx and fldmx instructions. We can ignore them for now.Gabe Black
2009-07-27ARM: Only send information that changed between statetrace and M5.Gabe Black
2009-07-27imported patch nativetracestreamline.patchGabe Black
2009-07-27ARM: Make native trace print out what instruction caused an error.Gabe Black
2009-07-27imported patch statetracehost.patchGabe Black
2009-07-27ARM: Add ARM support to statetrace.Ali Saidi
2009-07-27Statetrace: Fix up headers.Gabe Black
2009-07-27ARM: Implement a basic version of the fmxr instruction.Gabe Black
2009-07-27ARM: Implement a basic version of the fmrx instruction.Gabe Black
2009-07-27ARM: Add in spots for the VFP control registers.Gabe Black
2009-07-27ARM: Fix the CLZ instruction.Gabe Black
2009-07-27ARM: Initialize the CPSR so that we're in user mode.Gabe Black
2009-07-27ARM: Set up the initial stack frame to match a recent Linux.Gabe Black
2009-07-27Elf: Add in some new aux vector type constants.Gabe Black
2009-07-27ARM: Make native trace only print when registers are changing value.Gabe Black
When registers have incorrect values but aren't actively changing, it's likely they're not being modified at all. The fact that they're still wrong isn't very important.
2009-07-27ARM: Add a native tracer.Gabe Black
--HG-- rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
2009-07-27ARM: Update the reference outputs for the new binary and fstat64 struct.Gabe Black
2009-07-27ARM: Fix fstat/fstat64 structs to match EABI definitions.Ali Saidi
2009-07-27ARM: Replace hello world with an EABI version.Gabe Black
2009-07-27ARM: Handle register indexed system calls.Ali Saidi
2009-07-27ARM: Detect OABI binaries and complain that they're no-longer supported.Ali Saidi
2009-07-26se-configs: edit se.py to account for non-O3CPU workloadsKorey Sewell
2009-07-25merge sparc fix w/2t regress fixKorey Sewell
2009-07-25regress: edit 2t hello smt file to specify numThreadsKorey Sewell